Datasheet DPO2039DABQ-13 (Diodes) - 5

DPO2039DABQ-13 Electrical Characteristics
(@ TA = +25°C, VVSYS = 4.2V, unless otherwise specified) (continued)
Symbol Parameter Test Conditions Min Typ Max Unit Power Supply and Leakage Current
V V VSYS steps up from 2V until CC or UVLO VVSYS under Voltage Lockout 2.15 2.4 2.55 V DIFF FETs turn ON VVSYS steps down from 2.5V until CC or DIFF FETs turn off. Measure VUVLO_HSYS VVSYS UVLO Hysteresis — 200 — mV difference between rising and falling UVLO to calculate

IVSYS_ON VVSYS Supply Current — — 190 — μA
T
Leakage current for CCxC when device is
C
ILEAK_CCxC V powered CCxC = 3.6V — — 30 μA
U
Leakage current for DIFFxC when device is
D
ILEAK_DIFFxC V powered DIFFxC = 3.6V — — 35 μA
O
Leakage current for CCxS when device is ILEAK_CCxS VCCx = 3.6V — — 30 μA
R
powered Leakage current for DIFFxS when device is
P
ILEAK_DIFFxS V powered DIFFx = 3.6V — — 35 μA
W
VVSYS = 0V, VCCxC = 22V, VCCxS = — — 150 μA
E
Leakage current into CCxC pins when 0V ILEAK_OVP_CCxC
N
device is in OVP VVSYS = 4.2V, VCCxC = 22V, VCCxS = — — 150 μA 0V VVSYS = 0V, VDIFFxC = 22V, VDIFFxS = — — 200 μA Leakage current into DIFFxC pins when 0V ILEAK_OVP_DIFFxC device is in OVP VVSYS = 4.2V, VDIFFxC = 22V, VDIFFxS — — 200 μA = 0V VVSYS = 0V, VCCxC = 22V, VCCxS = — — 1 μA Leakage current out of CCxS pins when 0V ILEAK_OVP_CCxS device is in OVP VVSYS = 4.2V, VCCxC = 22V, VCCxS = — — 1 μA 0V VVSYS = 0V, VDIFFxC = 22V, VDIFFxS = — — 1 μA Leakage current out of DIFFxS pins when 0V ILEAK_OVP_DIFFxS device is in OVP VVSYS = 4.2V, VDIFFxC = 22V, VDIFFxS — — 1 μA = 0V
FAULTB Pin
VFAULTB Active-Low Output Voltage of FAULTB Pin IOL = 8mA — — 0.4 V ILEAK_FAULB FAULTB Leakage Current VFAULTB = 4.2V — — 1 μA tFAULTB_ASSERTION FAULTB Assertion Time — — — 300 μs tFAULTB_DEASSERTION FAULTB Deassertion Time — — 4 — ms
Timing Requirements
Time from Crossing Rising V t VSYS UVLO ON — — — 2.5 ms until CC/DIFF OVP FETs are on OVP Response Time on the CC Pins, Time tOVP_RESPONSE_CC — — 100 — ns from OVP Asserted until OVP FETs Turnoff OVP Response Time on the DIFF Pins, tOVP_RESPONSE_DIFF Time from OVP Asserted until OVP FETs — — 100 — ns Turnoff OVP Recovery Time on the CC Pins. Once an OVP has occurred, the minimum tOVP_RESPONSE_CC_1 — 26 32 38 ms duration until CC FETs turn back on if OVP has been removed already OVP Recovery Time on the DIFF Pins. Once an OVP has occurred, the minimum tOVP_RESPONSE_DIFF_1 — 26 32 38 ms duration until DIFF FETs turn back on if OVP has been removed already OVP Recovery Time on the CC Pins. Time tOVP_RESPONSE_CC_2 from OVP removal until CC FETs turn back — — 1 — ms on, if device has been in OVP > 40ms OVP Recovery Time on the DIFF Pins. Time from OVP removal until DIFF FETs tOVP_RESPONSE_DIFF_2 — — 1 — ms turn back on, if device has been in OVP > 40ms
Thermal Shutdown and Hysteresis
TSHDN Thermal Shut Down Threshold — — +150 — °C THSYS Thermal Shut Down Hysteresis — — +20 — °C Note: 6. Guaranteed by bench characterization DPO2039DABQ-13 5 of 13 December 2019 Document number: DS41005 Rev. 1 - 2
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