Datasheet IRF6775MTRPbF (Infineon) - 6

IRF6775MTRPbF
Id Vds Vgs L VCC DUT 0 S Vgs(th) 1K 20K Qgodr Qgd Qgs2 Qgs1
Fig 17a.
Gate Charge Test Circuit
Fig 17b.
Gate Charge Waveform Driver Gate Drive P.W.
D.U.T
Period D = P.W. Period + *** V ƒ Circuit Layout Considerations GS=10V • Low Stray Inductance • Ground Plane - • Low Leakage Inductance D.U.T. I Current Transformer SD Waveform + Reverse ‚ Recovery Body Diode Forward „ Current Current - + - di/dt D.U.T. VDS Waveform Diode Recovery dv/dt  VDD * • dv/dt controlled by R V G DD Re-Applied RG + Voltage • Driver same type as D.U.T. Body Diode Forward Drop ** • ISD controlled by Duty Factor "D" - Inductor Curent • D.U.T. - Device Under Test Ripple ≤ 5% ISD * Use P-Channel Driver for P-Channel Measurements *** VGS = 5V for Logic Level Devices ** Reverse Polarity for P-Channel
Fig 18.
Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs 6 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback February 26, 2014