Datasheet T835H-8G (STMicroelectronics) - 5

360° T835H-8G Characteristics (curves) Figure 8. Relative variation of leakage current versus Figure 7. Thermal resistance junction to ambient versus junction temperature for different values of blocking copper surface under tab voltage
Rth(j-a) (°C/W) IDRM/IRRM [Tj, VDRM/VRRM] / IDRM/IRRM [Tj max.,800 V] 80 1.0E+00 D²PAK Epoxy printed circuit board FR4, e = 35 µm Cu 70 1.0E-01 60 50 VD = VR = 800 V 1.0E-02 40 VD = VR = 600 V 30 1.0E-03 20 SCu(cm²) 1.0E-04 10 0 Tj(°C) 0 5 10 15 20 25 30 35 40 1.0E-05 25 50 75 100 125 150
Figure 10. Relative variation of holding current and Figure 9. Relative variation of gate trigger voltage and latching current versus junction temperature (typical current versus junction temperature (typical values) values)
IGT,VGT[Tj] / IGT,VGT[Tj = 25 °C] 2 IH,IL [Tj] / IH,IL [Tj = 25 °C] 1.6 IGT Q3 1.5 IGT Q1-Q2 1.2 1 VGT 0.8 IL 0.5 0.4 IH Tj (°C) 0 Tj (°C) 0 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Figure 11. Surge peak on-state current versus number of Figure 12. Non repetitive surge peak on-state current for a cycles sinusoidal pulse with width tp < 10 ms
ITSM(A) ITSM(A) 1000 90 T 80 j initial = 25 °C t =20ms 70 dl/dt limitation: 100 A/µs Non repetitive One cycle 60 Tj initial = 25 °C ITSM 50 100 40 30 Repetitive 20 Tc = 139°C 10 Number of cycles t (ms) 0 10 p 1 10 100 1000 0.01 0.10 1.00 10.00
DS13570
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Rev 2 page 5/12
α Document Outline 1 Characteristics 1.1 Characteristics (curves) 2 Package information 2.1 D²PAK package information 3 Ordering information Revision history