IRFP450, SiHFP450 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations D.U.T • Low stray inductance • Ground plane • Low leakage inductance current transformer - + - + - RG • dV/dt controlled by R + G • Driver same type as D.U.T. V - DD • ISD controlled by duty factor "D" • D.U.T. - device under test Driver gate drive P.W. Period D = P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery Body diode forward current current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Body diode forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91233. Document Number: 91233 www.vishay.com S-81271-Rev. A, 16-Jun-08 7
