Datasheet LTC1694 (Analog Devices) - 7

LTC1694
U U W U APPLICATIO S I FOR ATIO ACK Data Setup Time
a longer time is required for this SMBus slave device to pull SDA low before the rising edge of the ACK clock pulse. The data setup time requirement for ACK (acknowledge) must be fulfilled if a high value of RS is used. An acknowl- To ensure sufficient data setup time for ACK, SMBus slave edge is accomplished by the SMBus host releasing the devices, with high values of RS, should pull the SDA low SDA line (pulling high) at the end of the last bit sent and the earlier. Typically, a minimum setup time of 1.5µs is needed SMBus slave device pulling the SDA line low before the for an SMBus device with an RS of 700Ω and a bus rising edge of the ACK clock pulse. capacitance of 200pF. The LTC1694 2.2mA boosted pull-up current is activated An alternative is that the SMBus slave device can hold SCL when the SMBus host releases the SDA line, allowing the line low until the SDA line reaches a stable state. Then, SCL voltage to rise above the LTC1694’s comparator threshold can be released to generate the ACK clock pulse. of 0.65V. If an SMBus slave device has a high value of RS,
U PACKAGE DESCRIPTIO S5 Package 5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635) 0.62 0.95 2.90 BSC MAX REF (NOTE 4) 1.22 REF 1.50 – 1.75 2.80 BSC 3.85 MAX 2.62 REF 1.4 MIN (NOTE 4) PIN ONE RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45 TYP 0.95 BSC PER IPC CALCULATOR 5 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 1.90 BSC NOTE: (NOTE 3) S5 TSOT-23 0302 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 1694fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7