Datasheet LT8640, LT8640-1 (Analog Devices) - 12

LT8640/LT8640-1
PIN FUNCTIONS
Diagram for internal pull-up and pull-down resistance. 3) During synchronization the part will operate in forced Spread spectrum mode. Tie this pin high to INTVCC (~3.4V) continuous mode. or an external supply of 3V to 4V for pulse-skipping mode
GND (Pins 18):
LT8640/LT8640-1 Ground Pin. Connect with spread spectrum modulation. 4) Synchronization this pin to system ground and to the ground plane. mode. Drive this pin with a clock source to synchronize to an external frequency. During synchronization the part
PG (Pin 19):
The PG pin is the open-drain output of an will operate in pulse-skipping mode. internal comparator. PG remains low until the FB pin is within ±8% of the final regulation voltage, and there are
SYNC/MODE (Pin 17, LT8640-1 Only):
For the LT8640-1, no fault conditions. PG is valid when V this pin programs four different operating modes: 1) IN is above 3.4V, regardless of EN/UV pin state. Burst Mode operation. Tie this pin to ground for Burst Mode operation at low output loads—this will result in
FB (Pin 20):
The LT8640/LT8640-1 regulates the FB pin to ultralow quiescent current. 2) Forced Continuous mode 0.970V. Connect the feedback resistor divider tap to this (FCM). This mode offers fast transient response and pin. Also, connect a phase lead capacitor between FB and full frequency operation over a wide load range. Float VOUT. Typically, this capacitor is 4.7pF to 22pF. this pin for FCM. When floating, pin leakage currents
SW (Exposed Pad Pins 21, 22):
The exposed pads should should be <1µA. 3) Spread spectrum mode. Tie this pin be connected and soldered to the SW trace for good thermal high to INTVCC (~3.4V) or an external supply of 3V to performance. If necessary due to manufacturing limita- 4V for forced continuous mode with spread-spectrum tions Pins 21 and 22 may be left disconnected, however modulation. 4) Synchronization mode. Drive this pin with thermal performance will be degraded. a clock source to synchronize to an external frequency.
BLOCK DIAGRAM
VIN2 V 13 IN1 VIN 4 CIN2 CIN3 CIN1 – INTERNAL 0.97V REF + 3.4V BIAS R3 1V + REG 1 OPT EN/UV 14 – SHDN SLOPE COMP INTV R4 CC 2 OPT C OSCILLATOR VCC ERROR PG 200kHz TO 3MHz BST 19 ±8% AMP 3 + V C + C BURST SWITCH M1 BST V – DETECT LOGIC SW L OUT AND VOUT ANTI- 8, 9, 21, 22 COUT SHOOT SHDN C1 R1 THERMAL SHDN THROUGH M2 INTVCC UVLO R2 VIN UVLO FB 20 SHDN INTVCC CSS THERMAL SHDN OPT 1.9µA V GND1 IN UVLO TR/SS 16 6, 7 60k RT RT GND2 15 10, 11 SYNC/MODE 600k 17 GND 8640 BD 18 Rev. D 12 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts