Datasheet ADHV4702-1 (Analog Devices) - 3

Data Sheet ADHV4702-1 FUNCTIONAL BLOCK DIAGRAM IN– COMP DGND 12 11 10 BIAS BIAS CELL CURRENT 9 RADJ RESERVED 1 SLEW BOOST CIRCUIT SLEW BOOST CURRENT HIGH-SIDE GAIN STAGE IN+ 2 + – – INPUT 8 SD TEMPERATURE STAGE SENSOR + 5V + – LOW-SIDE GAIN STAGE AMPLIFIER RESERVED 3 SIGNAL PATH 7 VCC
-001
4 5 6 VEE TMP OUT
16047 Figure 3. Rev. B | Page 3 of 21 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ±12 V TO ±110 V SUPPLY ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INTERNAL ELECTROSTATIC DISCHARGE (ESD) PROTECTION SLEW BOOST CIRCUIT AND PROTECTION DIGITAL GROUND (DGND) RESISTOR ADJUSTABLE QUIESCENT CURRENT (RADJ) SHUTDOWN PIN (SDB) TEMPERATURE MONITOR (TMP) OVERTEMPERATURE PROTECTION OUTPUT CURRENT DRIVE AND SHORT-CIRCUIT PROTECTION EXTERNAL COMPENSATION AND CAPACITIVE LOAD (CLOAD) DRIVING SAFE OPERATING AREA LFCSP PACKAGE AND HIGH VOLTAGE PIN SPACING EXPOSED PAD (EPAD) APPLICATIONS INFORMATION POWER SUPPLY AND DECOUPLING HIGH VOLTAGE GUARD RING HIGH VOLTAGE DAC VOLTAGE SUBTRACTOR HIGH CURRENT OUTPUT DRIVER SIGNAL RANGE EXTENDER OUTLINE DIMENSIONS ORDERING GUIDE