Datasheet ADL8111 (Analog Devices) - 10

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ADL8111 Data Sheet INTERNAL AMPLIFIER STATE 16 16 12 14 8 12 ) 4 ) B S11 B S21 10 0 S22 SE (d SE (d N N 8 –4 ESPO ESPO 6 R –8 R 4 5.5V –12 5.0V 4.5V –16 2 –20 0 0 1 2 3 4 5 6 7 8 9 10
029
0 1 2 3 4 5 6 7 8
032
FREQUENCY (GHz)
20106-
FREQUENCY (GHz)
20106- Figure 26. Broadband Gain and Return Loss vs. Frequency (100 MHz to 10 GHz), Figure 29. Gain vs Frequency Over VDD (100 MHz to 10 GHz), State = Internal Amplifier (Refer to Figure 76 for the Test Circuit) State = Internal Amplifier (Refer to Figure 76 for the Test Circuit)
16 16 14 14 12 12 ) ) B 10 B 10 SE (d SE (d N 8 N 8 ESPO 6 ESPO 6 R R +85°C 4 +25°C +85°C 4 –40°C +25°C –40°C 2 2 0 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
030
0 1 2 3 4 5 6 7 8
033
FREQUENCY (GHz)
20106-
FREQUENCY (GHz)
20106- Figure 27. Gain Over Temperature vs. Frequency (10 MHz to 100 MHz) Figure 30. Gain vs. Frequency Over Temperature (100 MHz to 10 GHz) State = Internal Amplifier (Refer to Figure 76 for the Test Circuit) State = Internal Amplifier (Refer to Figure 76 for the Test Circuit)
0 0 +85°C –5 –5 +25°C –40°C B) B) d d ( ( S S S S O –10 O –10 URN L URN L T T –15 –15 RE RE UT UT +85°C INP +25°C INP –20 –40°C –20 –25 –25 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
031
0 1 2 3 4 5 6 7 8
034
FREQUENCY (GHz)
20106-
FREQUENCY (GHz)
20106- Figure 28. Input Return Loss vs. Frequency (10 MHz to 100 MHz), Figure 31. Input Return Loss vs. Frequency Over Temperature (100 MHz to 8 GHz), State = Internal Amplifier (Refer to Figure 76 for the Test Circuit) State = Internal Amplifier (Refer to Figure 76 for the Test Circuit) Rev. 0 | Page 10 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER DERATING CURVES ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS EXTERNAL BYPASS A STATE INTERNAL AMPLIFIER STATE INTERNAL BYPASS STATE EXTERNAL BYPASS B STATE TEST CIRCUITS THEORY OF OPERATION SIGNAL PATH STATES FOR DIGITAL CONTROL INPUTS APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING During Power-Up During Power-Down EVALUATION PCB EVALUATION BOARD SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE