link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 3 link to page 3 link to page 4 link to page 4 link to page 5 link to page 5 link to page 5 link to page 5 link to page 6 link to page 7 link to page 8 link to page 18 link to page 19 link to page 20 link to page 20 link to page 21 link to page 22 link to page 23 link to page 23 link to page 24 link to page 24 ADL9005Data SheetTABLE OF CONTENTS Features .. 1 Pin Configuration and Function Descriptions ...6 Applications .. 1 Interface Schematics ...7 Functional Block Diagram .. 1 Typical Performance Characteristics ...8 General Description ... 1 Biasing Through the ACG4/VDD2 Pin .. 18 Revision History ... 2 Theory of Operation .. 19 Specifications .. 3 Applications Information ... 20 0.01 GHz to 14 GHz ... 3 Basic Connections .. 20 14 GHz to 20 GHz .. 3 Biasing the ADL9005 by Using the LTM8020 ... 21 20 GHz to 26.5 GHz ... 4 Providing Drain Bias ... 22 DC Specifications ... 4 Providing Drain Bias Through the ACG4/VDD2 Pin ... 23 Absolute Maximum Ratings ... 5 Power-Up and Power-Down Sequencing... 23 Thermal Resistance .. 5 Outline Dimensions ... 24 Electrostatic Discharge (ESD) Ratings .. 5 Ordering Guide .. 24 ESD Caution.. 5 REVISION HISTORY2/2021—Revision 0: Initial Version Rev. 0 | Page 2 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 0.01 GHz TO 14 GHz 14 GHz TO 20 GHz 20 GHz TO 26.5 GHz DC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADL9005 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS BIASING THROUGH THE ACG4/VDD2 PIN THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS BIASING THE ADL9005 BY USING THE LTM8020 PROVIDING DRAIN BIAS PROVIDING DRAIN BIAS THROUGH THE ACG4/VDD2 PIN POWER-UP AND POWER-DOWN SEQUENCING OUTLINE DIMENSIONS ORDERING GUIDE
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