Datasheet HMC903LP3E (Analog Devices) - 8

HMC903LP3E Data Sheet 94 30 120 92 25 100 90 20 80 Bm) 88 d 3 ( P mA) mA) 86 , I ( 15 60 ( B) I DD d I DD 84 N ( AI 10 40 G 82 5 20 IP3 80 GAIN IDD 78 0 0 –30 –27 –24 –21 –18 –15 –12 –9 –6 –3 0 3
019
–0.7 –0.6 –0.5 –0.4 –0.3 –0.2 –0.1 0
020
INPUT POWER (dBm) V
14479-
GG1, VGG2 GATE VOLTAGE (V dc)
14479- Figure 19. Supply Current (IDD) vs. Input Power (Board Loss Removed from Figure 20. Gain, Output Third-Order Intercept (IP3), and Supply Current (IDD) vs. Gain Measurement and Data Taken at VDD1 = VDD2 = 3 V) VGG1, VGG2 Gate Voltage Rev. I | Page 8 of 13 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications 6 GHz to 16 GHz Frequency Range 16 GHz to 17 GHz Frequency Range Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Theory of Operation Applications Information Recommended Bias Sequence During Power Up Recommended Bias Sequence During Power Down Evaluation PCB Typical Application Circuits Outline Dimensions Ordering Guide