Datasheet ADPA7005CHIP (Analog Devices) - 6

ADPA7005CHIP Data Sheet INTERFACE SCHEMATICS GND
003 17319-
VGG1, VGG2
007 Figure 3. GND Interface Schematic 17319- Figure 7. VGG1, VGG2 Interface Schematic 004
VREF
17319- 008 Figure 4. VREF Interface Schematic
RFOUT
17319- Figure 8. RFOUT Interface Schematic
VDET
005
V
17319-
DD1 TO VDD6
009 Figure 5. VDET Interface Schematic 17319- Figure 9. VDD1 to VDD6 Interface Schematic 006
RFIN
17319- Figure 6. RFIN Interface Schematic Rev. 0 | Page 6 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 20 GHz TO 34 GHz FREQUENCY RANGE 34 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC CONSTANT IDD OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions Mounting Wire Bonding BIASING ADPA7005CHIP WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE FOR ADPA7005CHIP VGGx ABSOLUTE MAXIMUM RATING REQUIREMENT HMC980LP4E BIAS SEQUENCE Power-Up Sequence Power-Down Sequence CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE