Data SheetADPA7002INTERFACE SCHEMATICSGND 003 VGG1 20071- 007 20071- Figure 3. GND Interface Schematic Figure 7. VGG1 Schematic VREF 008 004 RFOUT 20071- 20071- Figure 4. VREF Interface Schematic Figure 8. RFOUT Interface Schematic VDETVDD1 TO VDD4 005 20071- 009 20071- Figure 5. VDET Interface Schematic Figure 9. VDD1 to VDD4 Interface Schematic 006 RFIN 20071- Figure 6. RFIN Interface Schematic Rev. 0 | Page 7 of 21 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications 18 GHz to 20 GHz Frequency Range 20 GHz to 24 GHz Frequency Range 24 GHz to 34 GHz Frequency Range 34 GHz to 44 GHz Frequency Range Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Constant IDD Operation Theory of Operation Applications Information Biasing Procedures Biasing the ADPA7002 with the HMC980LP4E Application Circuit Setup Limiting VGATE to Meet the ADPA7002 VGG1 AMR Requirement HMC980LP4E Bias Sequence Constant Drain Current Biasing vs. Constant Gate Voltage Biasing Testing the HMC980LP4E Outline Dimensions Ordering Guide
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