Data SheetADPA7001CHIPSABSOLUTE MAXIMUM RATINGS Table 4.THERMAL RESISTANCEParameter Rating Thermal performance is directly linked to printed circuit board Drain Bias Voltage (VDD) 4.5 V (PCB) design and operating environment. Careful attention to Gate Bias Voltage (VGG) −2 V to 0 V dc PCB thermal design is required. θJC is the junction-to-case Radio Frequency (RF) Input Power (RFIN) 17 dBm thermal resistance. Continuous Power Dissipation (PDISS), 2.4 W at TDIE BOTTOM = 85°C (Derate 26.95 mW/°C Table 5. Thermal Resistance Above 85°C) Package TypeθJC Unit Storage Temperature Range (Ambient) −65°C to +150°C C-16-2 37.1 °C/W Operating Temperature Range (Die Bottom) −55°C to +85°C ESD Sensitivity ESD CAUTION Human Body Model (HBM) Class 0 125 V Channel Temperature to Maintain 1 Million 175°C Hour Mean Time to Failure (MTTF) Nominal Channel Temperature at 130.4°C TDIE BOTTOM = 85°C, VDD = 3.5 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 5 of 18 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS 50 GHz TO 70 GHz FREQUENCY RANGE 70 GHz TO 90 GHz FREQUENCY RANGE 90 GHz TO 95 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions Mounting Wire Bonding TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE
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