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Datasheet ADL6012 (Analog Devices) - 24

ПроизводительAnalog Devices
Описание2 GHz to 67 GHz, 500 MHz Bandwidth Envelope Detector
Страниц / Страница24 / 24 — ADL6012. Data Sheet. OUTLINE DIMENSIONS. DETAIL A. (JEDEC 95). 2.54. …
Формат / Размер файлаPDF / 713 Кб
Язык документаанглийский

ADL6012. Data Sheet. OUTLINE DIMENSIONS. DETAIL A. (JEDEC 95). 2.54. 3.10. 2.44. 3.00. 2.34. 0.50 BSC. 2.90. PIN 1. 2.10. 1.00. INDICATOR. AREA. 2.00. 0.35

ADL6012 Data Sheet OUTLINE DIMENSIONS DETAIL A (JEDEC 95) 2.54 3.10 2.44 3.00 2.34 0.50 BSC 2.90 PIN 1 2.10 1.00 INDICATOR AREA 2.00 0.35

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ADL6012 Data Sheet OUTLINE DIMENSIONS DETAIL A (JEDEC 95) 2.54 3.10 2.44 3.00 2.34 0.50 BSC 2.90 6 10 PIN 1 2.10 1.00 INDICATOR AREA 2.00 0.35 EXPOSED 0.90 PAD 1.90 0.30 0.80 0.25 5 1 TOP VIEW BOTTOM VIE W P IN 1 IN D IC AT O R AR E A OP T IO N S (SEE DETAIL A) 0.80 FOR PROPER CONNECTION OF 0.75 SIDE VIEW 0.05 MAX THE EXPOSED PAD, REFER TO 0.70 0.02 NOM THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. SEATING 0.30 PLANE 0.25 0.203 REF 0.20 B 2018- -003696 20- G K P COMPLIANT TO JEDEC STANDARDS MO-229-WCED-3 08-
Figure 69. 10-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 2 mm Body and 0.75 mm Package Height (CP-10-12) Dimensions shown in millimeters
ORDERING GUIDE Ordering Marking Model1 Temperature Range Package Description Package Option Quantity Code
ADL6012ACPZN −40°C to +105°C 10-Lead Lead Frame Chip Scale Package [LFCSP] CP-10-12 1 C9Y ADL6012ACPZN-R2 −40°C to +105°C 10-Lead Lead Frame Chip Scale Package [LFCSP] CP-10-12 100 C9Y ADL6012ACPZN-R7 −40°C to +105°C 10-Lead Lead Frame Chip Scale Package [LFCSP] CP-10-12 1000 C9Y ADL6012SCPZN −55°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP] CP-10-12 1 CAL ADL6012SCPZN-R2 −55°C to +125°C 10-Lead Lead Frame Chip Scale Package [LFCSP] CP-10-12 100 CAL ADL6012-EVALZ Evaluation Board 1 1 Z = RoHS Compliant Part.
©2020 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D16086-5/20(0)
Rev. 0 | Page 24 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS MEASUREMENT SETUPS THEORY OF OPERATION BASIC CONNECTIONS RF INPUT ENVELOPE OUTPUT INTERFACE COMMON-MODE VOLTAGE INTERFACE ENABLE INTERFACE DECOUPLING INTERFACE PCB LAYOUT RECOMMENDATIONS SYSTEM CALIBRATION AND MEASUREMENT ERROR APPLICATIONS INFORMATION EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
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