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Datasheet AD5522 (Analog Devices) - 3

ПроизводительAnalog Devices
ОписаниеQuad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs
Страниц / Страница64 / 3 — Data Sheet. AD5522. REVISION HISTORY. 6/2018—Rev. E to Rev. F. …
ВерсияF
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Язык документаанглийский

Data Sheet. AD5522. REVISION HISTORY. 6/2018—Rev. E to Rev. F. 10/2008—Rev. 0 to Rev. A. 5/2012—Rev. D to Rev. E

Data Sheet AD5522 REVISION HISTORY 6/2018—Rev E to Rev F 10/2008—Rev 0 to Rev A 5/2012—Rev D to Rev E

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Data Sheet AD5522 REVISION HISTORY 6/2018—Rev. E to Rev. F 10/2008—Rev. 0 to Rev. A
Changes to Table 1 .. 7 Changes to Table 1 .. 6 Changes to Table 2 .. 11 Change to 4 DAC X1 Parameter, Table 2 ... 11 Changes to Figure 5 ... 13 Changes to Table 3 .. 12 Changes to Choosing Power Supply Rails Section and Note 2, Change to Reflow Soldering Parameter, Table 4 ... 15 Table 10 ... 33 Changes to Figure 18, Figure 19, Figure 20, and Figure 21 ... 23 Moved Table 11 .. 34 Changes to Figure 25 .. 24 Changes to MV Transfer Function, Table 11 and Note 3, Changes to Force Amplifier Section ... 29 Table 11 ... 34 Changes to Clamps Section ... 29 Changes to Table 39 .. 60 Changes to High Current Ranges Section ... 30 Changes to Ordering Guide ... 63 Changes to Choosing Power Supply Rails Section ... 32

Changes to Compensation Capacitors Section ... 33
5/2012—Rev. D to Rev. E
Added Table 14, Renumbered Tables Sequentially ... 36 Change to MV Transfer Function, Table 11 .. 33 Changes to Reference Selection Example .. 36

Changes to Table 15 and BUSYE and LOADE Functions
2/2011—Rev. C to Rev. D
Section .. 40 Changes to Measure Current, Gain Error Tempco Parameter .. 6 Changes to Table 17 and Register Update Rates Section ... 41 Changes to Force Current, Common Mode Error (Gain = 5) Added Table 38 .. 57 and Common Mode Error (Gain = 10) Parameters ... 7 Changes to Ordering Guide ... 60 Changes to Figure 5 ... 13 Changes to Figure 6 ... 14
7/2008—Revision 0: Initial Version
Changes to Figure 15 .. 22 Changes to High Current Ranges Section ... 31 Changes to Gain and Offset Registers Section .. 36 Changes to Endnote 1 in Table 17 and Figure 56 .. 43 Changes to Register Update Rates and Figure 57 ... 44 Changes to Bit 15 to Bit 0 Description in Table 28 ... 50
5/2010—Rev. B to Rev. C
Changes to Compensation Capacitors Section ... 34 Changes to Gain and Offset Registers Section .. 36 Changes to Table 14 and Reducing Zero-Scale Error Section .. 38 Changes to Serial Interface Write Mode Section and BUSYE and LOADE Functions Section ... 42 Changes to Table 17 .. 43 Added Table 18; Renumbered Sequentially ... 43 Changes to Register Update Rates Section .. 44 Changes to Table 23 .. 46 Changes to Table 31 .. 54
10/2009—Rev. A to Rev. B
Changes to Table 1 .. 6 Changes to Table 2 .. 11 Added Figure 13 and Figure 15; Renumbered Sequentially .. 22 Added Figure 16 .. 23 Changes to Figure 21 .. 23 Changes to Clamps Section ... 30 Changes to Table 22, Bit 21 to Bit 18 Description .. 44 Changes to Table 25, Bit 9 Description .. 47 Changes to Table 28 .. 49 Changes to Figure 59 .. 59

Rev. F | Page 3 of 64 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications Timing Characteristics Circuit and Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Force Amplifier Comparators Clamps Current Range Selection High Current Ranges Measure Current Gains VMID Voltage Choosing Power Supply Rails Measure Output (MEASOUTx Pins) Device Under Test Ground (DUTGND) Guard Amplifier Compensation Capacitors System Force and Sense Switches Temperature Sensor DAC Levels Offset DAC Gain and Offset Registers Cached X2 Registers Gain and Offset Registers for the FIN DAC Gain and Offset Registers for the Comparator DACs Gain and Offset Registers for the Clamp DACs Reference Voltage (VREF) Reference Selection Reference Selection Example Calibration Reducing Zero-Scale Error Reducing Gain Error Calibration Example Additional Calibration System Level Calibration Circuit Operation Force Voltage (FV) Mode Force Current (FI) Mode Serial Interface SPI Interface LVDS Interface Serial Interface Write Mode RESETB Function BUSYB and LOADB Functions Register Update Rates Register Selection Readback Control, RD/WRB PMU Address Bits: PMU3, PMU2, PMU1, PMU0 NOP (No Operation) Reserved Commands Write System Control Register Write PMU Register Write DAC Register DAC Addressing Read Registers Readback of System Control Register Readback of PMU Register Readback of Comparator Status Register Readback of Alarm Status Register Readback of DAC Register Applications Information Power-On Default Setting Up the Device on Power-On Changing Modes Required External Components Power Supply Decoupling Power Supply Sequencing Typical Application for the AD5522 Outline Dimensions Ordering Guide
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