Datasheet A17700 (Allegro) - 9

Pressure Sensor Interface and Signal Conditioning IC A17700 with Polynomial Signal Compensation and Advanced Diagnostics
UVD and OVD repor�ng Disabled VCC (V) Device connected as per applica�on circuit (See Figure 2) VOVD(R) VOVD(F) Vcc(max) Vcc(typ) Vcc(min) VUVD(R) VUVD(F) VPOR(R) VPOR(F) Internal regulator ac�va�on (t) Output
P P P
State
W U W U hen nd H er N er N er N i f f f hen nd 0 g o o r r o o o o m m r r m m r r m m H V e V a a a a 0 V V e V CC < fi
Normal
a a ig CC h n n n VCC h l l l CC < fi = V n < I c R c R
Normal
c R mpe e < I V e a s � a s � e a s � = V n 0 OUT e V m 0 OUT e OUT N o V d
Opera�ons
O m N o O m N o O m OUT p V d , V < , < V Ou OUT Ou
Opera�ons
≤ T T T e V d e e e ≤ d V gu � OUT V CC c gu �c Al Performances gu �c VPU a PU a CC = t n n = t 0 put ce a outp r a outp a outp a All Performances r r ce n a guaranteed a put t n n V ee u t t 0 t guaranteed ee u ee u V d. t d. t d.
(t) UVD and OVD repor�ng Enabled VCC (V) Device connected as per applica�on circuit (See Figure 2) VOVD(R) VOVD(F) Vcc(max) Vcc(typ) Vcc(min) VUVD(R) VUVD(F) VPOR(R) VPOR(F) Internal regulator ac�va�on (t) Output
P
State
W U er N f W U H hen nd Hi o o r r hen nd i 0 g H gh Imp m m a a 0 V e V i V g V n l V e CC h c V V R CC < fi CC < fi
Normal
CC h = V n < I
Normal
OUT e a < mpe I V s � = V n V m 0 OUT e N o 0 OUT e OUT V d =
Opera�ons
OUT O m p V e V d , < V T e , PU dan gu � < V Ou ≤
Opera�ons
e Ou OUT V d ≤ d V c OUT V CC Al Performances VPU a PU a CC a outp = t n n put ra = t 0 ce All Performances ce guaranteed ce n put 0 V guaranteed tee u V t d.
(t)
Figure 3: Output Behavior Under VCC Ramp Conditions
9 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Package Functional Block Diagram Selection Guide Absolute Maximum Ratings Thermal Characteristics Pinout Diagram and Terminal List Operating Characteristics Functional Description Bandwidth Selection Output Response Time Power-On Time Front End Gain Adjustment Front End Differential Offset Adjustment Input Signal Range Calculation Fine Adjustment and Temperature Compensation Output Protocols Digital Output Mode Selection Digital Output Driver Fall Time Selection Broken Wire Detection Diagnostic Features Programming: Manchester Communication Entering Manchester Coding Manchester Interface Message Structure CRC Device Access Shadow Registers Device EEPROM and Register Access Lock EEPROM Map Volatile Registers Map Power Derating Package Outline Drawing