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Datasheet L6981 (STMicroelectronics) - 8

ПроизводительSTMicroelectronics
Описание38 V, 1.5 A synchronous step-down converter with low quiescent current
Страниц / Страница49 / 8 — L6981. Functional description. 6.1. Enable. Figure 4. Power up/down …
Формат / Размер файлаPDF / 3.5 Мб
Язык документаанглийский

L6981. Functional description. 6.1. Enable. Figure 4. Power up/down behavior. DS13554. Rev 1. page 8/49

L6981 Functional description 6.1 Enable Figure 4 Power up/down behavior DS13554 Rev 1 page 8/49

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L6981 Functional description 6 Functional description
The L6981 device is based on a “peak current mode”, constant frequency control. Therefore, the intersection between the error amplifier output and the sensed inductor current generates the PWM control signal to drive the power switch. The device features LNM (low noise mode) that implements a forced PWM control, or LCM (low consumption mode) to increase the efficiency at light-load. The main internal blocks shown in the block diagram in Figure 1 are: • Embedded power elements • The ramp for the slope compensation to avoid subharmonic instability • A transconductance error amplifier with integrated compensation network • The high-side current sense amplifier to sense the inductor current • A “Pulse Width Modulator” (PWM) comparator and the driving circuitry of the embedded power elements • The soft-start block ramps up the reference voltage on error amplifier, thus decreasing the inrush current at power-up. The EN pin inhibits the device when driven low • The EN/CLK pin section, which for LNM versions, allows synchronizing the device to an external clock generator • The pulse-by-pulse high-side / low-side switch current sensing to implement the constant current protection • A circuit to implement the thermal protection function • The OVP circuitry to discharge the output capacitor in case of overvoltage event.
6.1 Enable
The EN pin is a digital input that turns the device on or off. In order to maximize both the EN threshold accuracy and the current consumption, the device implements two different thresholds: 1. The Wake-Up threshold, VWAKE_UP = 0.5 V (see Table 6) 2. The Start-Up threshold, VEN = 1.2 V (see Table 6) The following image shows the device behavior.
Figure 4. Power up/down behavior DS13554
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Rev 1 page 8/49
Document Outline 1 Diagram 2 Pin configuration 3 Typical application circuit 4 Absolute maximum ratings 5 Electrical characteristics 6 Functional description 6.1 Enable 6.2 Soft-start 6.3 Undervoltage lockout 6.4 Light-load operation 6.4.1 Low consumption mode (LCM) 6.4.2 Low noise mode (LNM) 6.4.3 Efficiency for Low consumption mode and Low noise mode part number 6.4.4 Load regulation for low consumption mode and low noise mode part number 6.5 Overvoltage protection 6.5.1 Low consumption mode part number 6.5.2 Low noise mode part number 6.6 Overcurrent protection 6.7 Thermal shutdown 7 Closing the loop 7.1 GCO(s) control to output transfer function 7.2 Error amplifier compensation network 7.3 Voltage divider 8 Design of the power components 8.1 Programmable power up threshold 8.2 External synchronization (only available for Low Noise Mode) 8.3 Output voltage adjustment 8.4 Design of the power components 8.4.1 Input capacitor selection 8.4.2 Inductor selection 8.4.3 Output capacitor selection 9 Application board 10 Efficiency curves 11 Thermal dissipation 12 Package information 12.1 SO 8L package information 13 Ordering information Revision history
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