Datasheet PMN50XP (NXP) - 3

NXP Semiconductors PMN50XP P-channel TrenchMOS extremely low level FET
03aa25 03aa17 120 120 Ider Pder (%) (%) 80 80 40 40 0 0 0 50 100 150 200 0 50 100 150 200 Tsp (°C) Tsp (°C) I P D tot I = × 100 % P = × 100 % d er I d er P D(25°C) tot(25°C)
Fig 1. Normalized continuous drain current as a Fig 2. Normalized total power dissipation as a function of solder point temperature function of solder point temperature
001aae333 −102 ID (A) Limit R t DSon = −VDS/−ID p = 10 μs −10 100 μs 1 ms −1 10 ms DC 100 ms −10−1 −10−1 −1 −102 −10 VDS (V) T = 25 °C; I is single pulse s p DM
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PMN50XP_2 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 02 — 2 October 2007 3 of 11
Document Outline 1. Product profile 1.1 General description 1.2 Features 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents