Datasheet ADT7461A (ON Semiconductor) - 4

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ADT7461A Table 5. ELECTRICAL CHARACTERISTICS
(TA = −40°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.)
Parameter Conditions Min Typ Max Unit Power Supply
Supply Voltage, VDD 3.0 3.30 3.6 V Average Operating Supply Current, IDD 0.0625 Conversions/Sec Rate (Note 1) − 240 350 mA Standby Mode − 5.0 30 Undervoltage Lockout Threshold VDD Input, Disables ADC, Rising Edge − 2.55 − V Power-On-Reset Threshold 1.0 − 2.5 V
Temperature-To-Digital Converter
Local Sensor Accuracy 0°C ≤ TA ≤ +70°C − − ±1.0 °C 0°C ≤ TA ≤ +85°C − − ±1.5 −40°C ≤ TA ≤ +100°C − − ±2.5 Resolution − 1.0 − °C Remote Diode Sensor Accuracy 0°C ≤ TA ≤ +70°C, −55°C ≤ TD (Note 2) ≤ +150°C − − ±1.0 °C 0°C ≤ TA ≤ +85°C, −55°C ≤ TD (Note 2) ≤ +150°C − − ±1.5 −40°C ≤ TA ≤ +100°C, −55°C ≤ TD (Note 2) ≤ +150°C − − ±2.5 Resolution − 0.25 − °C Remote Sensor Source Current High Level (Note 3) − 220 − mA Middle Level (Note 3) − 82 − Low Level (Note 3) − 13.5 − Conversion Time From Stop Bit to Conversion Complete, One-shot − 40 52 ms Mode with Averaging Switched On One-shot Mode with Averaging Off (That Is, − 6.0 8.0 ms Conversion Rate = 16-, 32-, or 64-conversions per Second) Maximum Series Resistance Cancelled Resistance Split Evenly on Both the D+ and D– − 1.5 − kW Inputs
Open-Drain Digital Outputs (THERM, ALERT/THERM2)
Output Low Voltage, VOL IOUT = −6.0 mA − − 0.4 V High Level Output Leakage Current, IOH VOUT = VDD − 0.1 1.0 mA
SMBus Interface
(Note 3 and 4) Logic Input High Voltage, VIH SCLK, SDATA 3.0 V ≤ VDD ≤ 3.6 V 2.1 − − V Logic Input Low Voltage, VIL SCLK, SDATA 3.0 V ≤ VDD ≤ 3.6 V − − 0.8 V Hysteresis − 500 − mV SDA Output Low Voltage, VOL − − 0.4 mA Logic Input Current, IIH, IIL −1.0 − +1.0 mA SMBus Input Capacitance, SCLK, SDATA − 5.0 − pF SMBus Clock Frequency − − 400 kHz SMBus Timeout (Note 5) User Programmable − 25 64 ms SCLK Falling Edge to SDATA Valid Time Master Clocking in Data − − 1.0 ms 1. See Table 10 for information on other conversion rates. 2. Guaranteed by characterization, but not production tested. 3. Guaranteed by design, but not production tested. 4. See SMBus Timing Specifications section for more information. 5. Disabled by default. Detailed procedures to enable it are in the Serial Bus Interface section of the datasheet.
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