Datasheet 74AHCU04 (Nexperia)

74AHCU04 Hex unbuffered inverter Rev. 5 — 18 May 2020 Product data sheet 1. General description
The 74AHCU04 is high-speed Si-gate CMOS devices and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74AHCU04 is a general purpose hex unbuf ered inverter. Each of the six inverters is a single stage.
2. Features and benefits
• Low power dissipation • Balanced propagation delays • Inputs accepts voltages higher than VCC • ESD protection: • HBM JESD22-A114F: exceeds 2000 V • MM JESD22-A115-A: exceeds 200 V • CDM JESD22-C101C: exceeds 1000 V • Multiple package options • Specified from -40 °C to +125 °C
3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version
74AHCU04D -40 °C to +125 °C SO14 plastic small outline package; 14 leads; SOT108-1 body width 3.9 mm 74AHCU04PW -40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74AHCU04BQ -40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm Document Outline 1. General description 2. Features and benefits 3. Ordering information 4. Functional diagram 5. Pinning information 5.1. Pinning 5.2. Pin description 6. Functional description 7. Limiting values 8. Recommended operating conditions 9. Static characteristics 10. Dynamic characteristics 10.1. Waveforms 11. Typical transfer characteristics 12. Application information 13. Package outline 14. Abbreviations 15. Revision history 16. Legal information Contents