Datasheet PMG1-S0 (Infineon) - 4

PMG1-S0 Datasheet Table 1. Comparison of Features of Different MCUs of the PMG1 Family
(continued)
Subsystem or Range Item PMG1-S0 PMG1-S1 PMG1-S2 PMG1-S3*
48-QFN 24-QFN 40-QFN (6 × 6 mm, 0.5 mm pitch) Packages Package Options (4 × 4 mm, 40-QFN (6 × 6 mm, 0.5 mm pitch) (6 × 6 mm, 0.5 mm pitch) 0.5 mm pitch) 97-BGA (6 × 6 mm, 0.5 mm and 0.65 mm pitch) *Contact your local Cypress sales office for more information on PMG1-S3. The rest of the document discusses the PMG1-S0 device in detail. Document Number: 002-31596 Rev. *B Page 3 of 33 Document Outline PMG1-S0 Datasheet, Power Delivery Microcontroller Gen1 PMG1 Family General Description PMG1-S0 General Description Features Type-C Support and USB-PD Support Legacy/Proprietary Charging Block System-Level Fault Protection 32-bit MCU Subsystem Clocks and Oscillators Power System-Level ESD Protection Packages Block Diagram Contents Development Support Documentation Online Tools ModusToolbox™ IDE and PMG1 SDK Functional Overview MCU Subsystem CPU Flash SROM USB-PD Subsystem (SS) USB-PD Physical Layer ADC Charger Detection VBUS Undervoltage and Overvoltage Protection VBUS Short Protection PFET Gate Drivers on VBUS Path VBUS Discharge FETs Integrated Digital Blocks Serial Communication Blocks (SCB) Timer/Counter/PWM Block (TCPWM) I/O Subsystem Power Systems Overview Pinouts Application Diagram Electrical Specifications Absolute Maximum Ratings Device-Level Specifications I/O Digital Peripherals Pulse Width Modulation (PWM) for GPIO Pins I2C System Resources Power-on-Reset (POR) with Brown Out SWD Interface Internal Main Oscillator Internal Low-Speed Oscillator Power Down Gate Driver Specifications Analog to Digital Converter Memory Ordering Information Ordering Code Definitions Packaging Acronyms Document Conventions Units of Measure Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC® Solutions Cypress Developer Community Technical Support