Datasheet NC7SV57, NC7SV58 (ON Semiconductor) - 4

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NC7SV57, NC7SV58 Logic Configurations NC7SV58 Figure 7. 2−Input NAND Gate Figure 8. 2−Input AND with Inverted A Input Figure 9. 2−Input AND with Inverted B Input Figure 10. 2−Input OR Gate Figure 11. 2−Input XOR Gate
NOTE: Figure 7 through Figure 11 show the logical functions that can be implemented using the NC7SV58. The diagrams show the DeMorgan’s equivalent logic duals for a given 2−input function. Next to the logical implementation is the board level physical implementation of how the pins of the function should be connected.
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