Datasheet ADGS1212 (Analog Devices) - 8

ADGS1212 Data Sheet t1 SCLK t t 3 2 t4 t7 CS t t 6 5 SDI D7 D6 D0 D7 D6 D1 D0 INPUT BYTE FOR DEVICE N INPUT BYTE FOR DEVICE N + 1 t t10 9 SDO 0 0 0 D7 D6 D1 D0
-003
t ZERO BYTE INPUT BYTE FOR DEVICE N 8
936 15 Figure 3. Daisy-Chain Timing Diagram
t11 CS SCLK t
-004
13 t12
936 15 Figure 4. SCLK/CS Timing Diagram Rev. 0 | Page 8 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx Four Channels On One Channel On TIMING CHARACTERISTICS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ADDRESS MODE ERROR DETECTION FEATURES Cyclic Redundancy Check (CRC) Error Detection SCLK Count Error Detection Invalid Read/Write Address Error CLEARING THE ERROR FLAGS REGISTER BURST MODE SOFTWARE RESET DAISY-CHAIN MODE POWER-ON RESET APPLICATIONS INFORMATION BREAK-BEFORE-MAKE SWITCHING POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS REGISTER SUMMARY REGISTER DETAILS SWITCH DATA REGISTER ERROR CONFIGURATION REGISTER ERROR FLAGS REGISTER BURST ENABLE REGISTER SOFTWARE RESET REGISTER OUTLINE DIMENSIONS ORDERING GUIDE