Datasheet VNF1048F (STMicroelectronics) - 8

VNF1048F Main electrical characteristics ID Symbol Parameter Test conditions Min. Typ. Max. Unit
Junction Temperature ADC full scale range T 2.21 T J_ADC[9:0] = (TJ + 72) * J_ADC_CONV 0 1023 resolution 3 2.22 TJ_ADC_RATE Junction Temperature ADC sample rate 10 kSamples/s
Table 10. ST-SPI Specification: Timings ID Symbol Parameter Test conditions Min. Typ. Max. Unit
3.1 fC SPI Clock frequency 8 MHz VSPI = 3.3 V, 3.2 tWHCH CSN low timeout 30 70 ms ext RPROT < 1 kΩ Watchdog toggle bit timeout. WD_TIME Configuration: 00 50 3.3 tWDTB - 10 % + 10 % ms 01 100 10 150 11 200 Minimum time during which CSN must be toggled low to go 3.4 tSTBY_OUT 20 100 µs out of STDBY mode
Table 11. Charge Pump Specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
4.1 VCP_6V Charge Pump output voltage VS = 6V VS + 7 VS + 11 V 4.2 VCP_10V Charge Pump output voltage VS > 10 V VS + 13.5 VS + 14.5 VS + 15.5 V V Charge Pump output under voltage high CP_LOW_H Ramp up on V threshold CP VS + 5.5 VS + 6 VS + 6.5 V Charge Pump output under voltage low 4.5 VCP_LOW_L Ramp down on V threshold CP VS + 5.1 VS + 5.6 VS + 6.2 V V Charge Pump output under voltage CP_LOW_hyst 0.4 V hysteresis 4.6 fCP Charge Pump frequency - 5 % 400 + 5 % kHz Charge Pump low (CP_LOW diagnostic) 4.7 tCP_RISE - 5 % 60 + 5 % µs rising edge filtering time Charge Pump low (CP_LOW diagnostic) 4.8 tCP_FALL - 10 % 2.3 + 10 % µs falling edge filtering time
Table 12. External FET Gate Driver Specification ID Symbol Parameter Test conditions Min. Typ. Max. Unit
5.1 VGSON_6V Gate-On Voltage VS = 6 V, IG = 50 µA 6 V 5.2 VGSON_10V Gate-On Voltage VS > 10 V, IG = 50 µA 12 15 V 5.4 VGSOFF Gate-Off Voltage 0.5 V Maximum Gate Voltage 5.5 VGSMAX 20 V (internally limited) 5.6 tON Gate turn on VGS = 0.5 V to VGS = 10 V 4 µs
DS13084
-
Rev 6 page 8/52
Document Outline 1 Block diagram and pin description 2 Electrical specification 2.1 Absolute maximum ratings 2.2 Thermal data 2.3 Main electrical characteristics 3 eFuse function 4 Self Test 4.1 Current Sense Self Test 4.2 External FET VDS Detection Self Test 4.3 External FET Stuck-on Self Test 5 Protections 5.1 Battery undervoltage shutdown 5.2 Device overtemperature shutdown 5.3 External MOSFET overtemperature shutdown 5.4 External MOSFET desaturation shut-down 5.5 Hard short circuit latch-off 5.6 Current vs time latch-off 5.7 Low Current Bypass desaturation shut-down 6 SPI functional description 6.1 SPI Communication 6.2 Signal description 6.3 SPI protocol 6.4 Operating code definition 6.5 Write mode 6.6 Read mode 6.7 Read and clear status command 6.8 SPI device information 6.9 Special commands 6.10 Global status byte 6.11 Address map 6.12 ROM memory map 6.13 Control registers 6.14 Status registers 6.15 Timeout watchdog 7 Operating modes 7.1 State Diagram 7.2 PowerON mode 7.3 Stand-by mode 7.4 WakeUp mode 7.5 Unlocked mode 7.6 Locked mode 7.7 Self-test mode 8 Application information 9 Package information 9.1 QFN32L 5x5 package information Revision history