Datasheet IRLR8743PbF, IRLU8743PbF (Infineon) - 7

IRLR/U8743PbF Driver Gate Drive P.W.
D.U.T
Period D = P.W. Period + V * ƒ Circuit Layout Considerations GS=10V • Low Stray Inductance • Ground Plane - • Low Leakage Inductance D.U.T. I Current Transformer SD Waveform + Reverse ‚ Recovery Body Diode Forward „ Current Current - + - di/dt D.U.T. VDS Waveform Diode Recovery dv/dt  VDD • dv/dt controlled by R V G DD Re-Applied RG + Voltage • Driver same type as D.U.T. Body Diode Forward Drop • ISD controlled by Duty Factor "D" - Inductor Curent • D.U.T. - Device Under Test Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices
Fig 15.
Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Id Vds Vgs Vgs(th) Qgodr Qgd Qgs2 Qgs1
Fig 16.
Gate Charge Waveform www.irf.com 7