pulse is skipped during each access to external Data unconnected while XTAL1 is driven as shown in Figure 2. Memory. There are no requirements on the duty cycle of the external If desired, ALE operation can be disabled by setting bit 0 of clock signal, since the input to the internal clocking circuitry SFR location 8EH. With the bit set, ALE is active only dur- is through a divide-by-two flip-flop, but minimum and maxi- ing a MOVX or MOVC instruction. Otherwise, the pin is mum voltage high and low time specifications must be weakly pulled high. Setting the ALE-disable bit has no observed. effect if the microcontroller is in external execution mode. Idle ModePSEN In idle mode, the CPU puts itself to sleep while all the on- Program Store Enable is the read strobe to external pro- chip peripherals remain active. The mode is invoked by gram memory. software. The content of the on-chip RAM and all the spe- When the AT89C51 is executing code from external pro- cial functions registers remain unchanged during this gram memory, PSEN is activated twice each machine mode. The idle mode can be terminated by any enabled cycle, except that two PSEN activations are skipped during interrupt or by a hardware reset. each access to external data memory. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execu- EA/VPP tion, from where it left off, up to two machine cycles before External Access Enable. EA must be strapped to GND in the internal reset algorithm takes control. On-chip hardware order to enable the device to fetch code from external pro- inhibits access to internal RAM in this event, but access to gram memory locations starting at 0000H up to FFFFH. the port pins is not inhibited. To eliminate the possibility of Note, however, that if lock bit 1 is programmed, EA will be an unexpected write to a port pin when Idle is terminated by internally latched on reset. reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external EA should be strapped to VCC for internal program memory. executions. This pin also receives the 12-volt programming enable volt- Figure 1. Oscillator Connections age (VPP) during Flash programming, for parts that require 12-volt VPP. C2 XTAL2 XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. C1 XTAL1 XTAL2 Output from the inverting oscillator amplifier. GND Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz Note: C1, C2 = 30 pF ± 10 pF for Crystals crystal or ceramic resonator may be used. To drive the = 40 pF ± 10 pF for Ceramic Resonators device from an external clock source, XTAL2 should be left Status of External Pins During Idle and Power-down ModesModeProgram MemoryALEPSENPORT0PORT1PORT2PORT3 Idle Internal 1 1 Data Data Data Data Idle External 1 1 Float Data Address Data Power-down Internal 0 0 Data Data Data Data Power-down External 0 0 Float Data Data Data 4AT89C51 Document Outline Block Diagram Features Description Pin Description VCC GND Port 0 Port 1 Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Oscillator Characteristics Status of External Pins During Idle and Power-down Modes Lock Bit Protection Modes Programming the Flash Programming Interface Flash Programming Modes Flash Programming and Verification Waveforms - High-voltage Mode (VPP = 12V) Flash Programming and Verification Waveforms - Low-voltage Mode (VPP = 5V) Flash Programming and Verification Characteristics Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information
