Datasheet NC7SV74 (ON Semiconductor) - 6
Производитель | ON Semiconductor |
Описание | TinyLogic ULP-A D-Type Flip-Flop with Preset and Clear |
Страниц / Страница | 13 / 6 — Symbol (V) |
Формат / Размер файла | PDF / 553 Кб |
Язык документа | английский |
Symbol (V)

26 предложений от 16 поставщиков Триггер, дополнительный выход, положительный фронт, NC7S74, D, 1 нс, 200 МГц, 24 мА, US8 |
| NC7SV74K8X ON Semiconductor | от 5.70 ₽ | |
| NC7SV74K8X ON Semiconductor | 10 ₽ | |
| NC7SV74K8X Freescale | 13 ₽ | |
| NC7SV74K8X ON Semiconductor | от 67 ₽ | |
Модельный ряд для этого даташита
Текстовая версия документа
Symbol (V)
Maximum Clock fMAX Frequency tPLH Propagation Delay tPHL CK to Q, Q TA = +25°C VCC Parameter Min. 0.90 Typ. TA = -40°C to +85°C
Max. Min. Units Conditions Max.
CL = 15 pF,
RL = 1 M 50 1.10 VCC 1.30 150 150 1.40 VCC 1.60 200 200 1.65 VCC 1.95 200 200 CL = 15 pF,
MHz RL = 2 k
CL = 30 pF 2.30 VCC 2.70 200 200 RL = 500 2.70 VCC 3.60 200 200 0.90
1.10 VCC 1.30 3.0 6.0 9.9 1.0 14.6 1.40 VCC 1.60 1.0 3.2 6.0 1.0 7.2 1.65 VCC 1.95 1.0 1.9 4.5 1.0 5.3 CL = 30 pF 2.30 VCC 2.70 0.8 1.2 3.0 0.7 3.7 RL = 500 2.70 VCC 3.60 0.7 1.0 2.8 0.6 3.2 ns CL = 15 pF,
RL = 2 k 0.90 tPHL CLR, PR, to Q, Q 1.10 VCC 1.30 3.0 6.5 10.5 1.0 15.1 1.40 VCC 1.60 1.0 3.2 6.0 1.0 7.2 1.65 VCC 1.95 1.0 1.9 4.5 1.0 5.3 CL = 30 pF 2.30 VCC 2.70 0.8 1.2 3.0 0.7 3.7 RL = 500 2.70 VCC 3.60 0.7 1.0 2.8 0.6 3.2 CK to D tH tW tREC 6.5 ns CL = 15 pF,
RL = 2 k 1.10 VCC 1.30 3.5 3.5 2.0 2.0 1.65 VCC 1.95 1.5 1.5 CL = 30 pF 2.30 VCC 2.70 2.0 2.0 RL = 500 2.70 VCC 3.60 1.5 1.5 0.90 0.5 ns CL = 15 pF,
RL = 2 k 1.10 VCC 1.30 0.5 0.5 1.40 VCC 1.60 0.5 0.5 1.65 VCC 1.95 0.5 0.5 CL = 30 pF 2.30 VCC 2.70 0.5 0.5 RL = 500 2.70 VCC 3.60 0.5 0.5 ns CL = 15 pF,
RL = 2 k 0.90 CK, PR, CLR 1.10 VCC 1.30 4.0 4.0 1.40 VCC 1.60 3.0 3.0 1.65 VCC 1.95 3.0 3.0 CL = 30 pF 2.30 VCC 2.70 3.0 3.0 RL = 500 2.70 VCC 3.60 3.0 3.0 CLR, PR to CK 0.90 7.0 8.0 Figure 1
Figure 4 CL = 15 pF,
RL = 1 M Pulse Width, Recover Time Figure 1
Figure 4 CL = 15 pF,
RL = 1 M 0.5 7.0 Figure 1
Figure 3 CL = 15 pF,
RL = 1 M 6.5 1.40 VCC 1.60 Hold Time,
CK to D 14.0 0.90 Figure 1
Figure 3 CL = 15 pF,
RL = 1 M Propagation Delay Setup Time, Figure 1
Figure 5 CL = 15 pF,
RL = 1 M 13.0 tPLH tS Figure
Number ns CL = 15 pF,
RL = 2 k Figure 1
Figure 5 CL = 15 pF,
RL = 1 M 8.0 1.10 VCC 1.30 4.5 4.5 1.40 VCC 1.60 3.0 3.0 1.65 VCC 1.95 3.0 3.0 CL = 30 pF 2.30 VCC 2.70 3.0 3.0 RL = 500 2.70 VCC 3.60 3.0 3.0 ns CL = 15 pF,
RL = 2 k Figure 1
Figure 4 Capacitance
Symbol Parameter Typ. Units
pF Conditions
VCC = 0V Input Capacitance COUT Output Capacitance 4.5 pF VCC = 0V CPD Power Dissipation Capacitance 20.0 pF VI = VCC or 0V, f = 10 MHz © 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0 2.0 Max. CIN www.fairchildsemi.com
5 NC7SV74 — TinyLogic® ULP-A D Type Flip-Flop with Preset and Clear AC Electrical Characteristics