Datasheet AS6C6264 (Alliance Memory) - 2

February 2007 AS6C6264 Updated July 2017 ® 8K X 8 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION
Access time :55ns The AS6C6264 is a 65,536-bit low power CMOS Low power consumption: static random access memory organized as 8,192 Operation current : words by 8 bits. It is fabricated using very high 15mA (TYP.), VCC = 3.0V performance, high reliability CMOS technology. Its Standby current : standby current is stable within the range of 1µ A (TYP.), VCC = 3.0V operating temperature. Wide range power supply : 2.7 ~ 5.5V The AS6C6264 is well designed for low power Fully Compatible with all Competitors 5V product application, and particularly well suited for battery Fully Compatible with all Competitors 3.3V product back-up nonvolatile memory application. All inputs and outputs TTL compatible Fully static operation Tri-state output The AS6C6264 operates with wide range power Data retention voltage :1.5V (MIN.) supply.
All products ROHS Compliant
Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mm x 13.4mm sTSOP
FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION
Vcc A0 - A12 Address Inputs Vss DQ0 – DQ7 Data Inputs/Outputs CE#, CE2 Chip Enable Inputs 8K x8 A0-A12 DE C ODE R ME MOR Y AR R AY WE# Write Enable Input OE# Output Enable Input VCC Power Supply VSS Ground NC No Connection I/O DATA DQ0-DQ7 C OLUM N I/O C IR C UIT C E # C E 2 C ONTR OL WE # C IR C UIT OE #
July 2017, v2.0 Alliance Memory Inc Page 1 of 12