Datasheet AS6C6264 (Alliance Memory) - 4

February2007 AS6C6264 Updated July 2017 ® 8K X 8 BIT LOW POWER CMOS SRAM DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL TEST CONDITION MIN. TYP.
*5
MAX. UNIT
Supply Voltage VCC 2.7 5. 3.0 5 V Input High Voltage V *1 IH 2.4V - VCC+0.3 V Input Low Voltage V *2 IL - 5 . 0 - 6 . 0 V Input Leakage Current ILI VCC > = VIN > = VSS - 1 - 1 µA Output Leakage VCC > = VOUT > = V I SS, - 1 - 1 µA Current LO Output Disabled Output High Voltage VOH IOH = A m 1 - 4 . 2 0 . 3 - V Output Low Voltage VOL IOL = 2mA - - 0.4 V Cycle time = Min. ICC CE# = VIL and CE2 = VIH, - 55 - 15 45 mA II/O = 0mA Average Operating Power supply Current Cycle time = 1µs CE# I ≦0.2V and CE2≧VCC-0.2V, CC1 - 3 10 mA II/O = 0mA other pins at 0.2V or VCC-0.2V Standby Power CE# > = V *4 CC-0.2V -C 1 10 µA I Supply Current SB1 or CE2≦0.2V -I - 1 20* 4 µA Notes: C = Commercial Temperature I = Industrial temperature 1. VIH(max) =VCC + 3.0V for pulse width less than 10ns. 2. VIL(min) =VSS - 3.0V for pulse width less than 10ns. 3. Over/Undershoot specifications are characterized, not 100% tested. 4. 10µA for special request 5. Typical values are included for reference only and are not guaranteed or tested. Typical valued are measured at VCC = VCC(TYP.) and TA = 25ºC
CAPACITANCE (TA = 25ºC, f = 1.0MHz) PARAMETER SYMBOL MIN. MAX UNIT
Input Capacitance CIN - 6 pF Input/Output Capacitance CI/O - 8 pF Note :These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
n I t u p e s l u P e L l e v s 0 V 2 . o t VCC - 0.2V n I p t u e s i R d n a l a F s e m i T 3 s n Input and Output Timing Reference Levels 1.5V p t u O t u d a o L CL = 50pF + 1TTL, IOH/IOL = -1mA/2mA
July 2017, v2.0 Alliance Memory Inc Page 3 of 12