Datasheet EFM8SB2 (Silicon Labs) - 5

EFM8SB2 Data Sheet System Overview
3. System Overview 3.1 Introduction CIP-51 8051 Controller Port I/O Configuration Power On Core Reset/PMU Digital Peripherals Wake 64/32/16 KB ISP Flash UART Program Memory Reset Timers 0, Port 0 256 Byte SRAM 1, 2, 3
P0.n C2CK/RSTb
Debug / Drivers Programming Priority Hardware 4096 Byte XRAM PCA/WDT Crossbar Decoder Port 1 C2D SMBus
P1.n
Drivers SPI 0,1 Power Net
VDD
VREG Analog Digital CRC SYSCLK Power Power Crossbar Control Port 2
P2.n
Drivers
GND
System Clock SFR Configuration Bus External Memory Interface Precision Control 24.5 MHz Address Oscillator Data Low Power 20 MHz Analog Peripherals Oscillator Comparators Internal External XTAL1 External
+
Oscillator VREF VREF VDD
-+
XTAL2
-
Circuit VREF 10-bit Temp 6-bit IREF0
XTAL3
300ksps Sensor IREF RTC ADC AMUX
XTAL4
Oscillator GND Figure 3.1. Detailed EFM8SB2 Block Diagram
This section describes the EFM8SB2 family at a high level. For more information on each module including register definitions, see the EFM8SB2 Reference Manual.
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| Smart. Connected. Energy-friendly. Rev. 1.2 | 4 Document Outline 1. Feature List 2. Ordering Information 3. System Overview 3.1 Introduction 3.2 Power 3.3 I/O 3.4 Clocking 3.5 Counters/Timers and PWM 3.6 Communications and Other Digital Peripherals 3.7 Analog 3.8 Reset Sources 3.9 Debugging 3.10 Bootloader 4. Electrical Specifications 4.1 Electrical Characteristics 4.1.1 Recommended Operating Conditions 4.1.2 Power Consumption 4.1.3 Reset and Supply Monitor 4.1.4 Flash Memory 4.1.5 Power Management Timing 4.1.6 Internal Oscillators 4.1.7 Crystal Oscillator 4.1.8 External Clock Input 4.1.9 ADC 4.1.10 Voltage References 4.1.11 Temperature Sensor 4.1.12 Comparators 4.1.13 Programmable Current Reference (IREF0) 4.1.14 Port I/O 4.2 Thermal Conditions 4.3 Absolute Maximum Ratings 4.4 Typical Performance Curves 5. Typical Connection Diagrams 5.1 Power 5.2 Debug 5.3 Other Connections 6. Pin Definitions 6.1 EFM8SB2x-QFN32 Pin Definitions 6.2 EFM8SB2x-QFN24 Pin Definitions 6.3 EFM8SB2x-QFP32 Pin Definitions 7. QFN32 Package Specifications 7.1 QFN32 Package Dimensions 7.2 QFN32 PCB Land Pattern 7.3 QFN32 Package Marking 8. QFN24 Package Specifications 8.1 QFN24 Package Dimensions 8.2 QFN24 PCB Land Pattern 8.3 QFN24 Package Marking 9. QFP32 Package Specifications 9.1 QFP32 Package Dimensions 9.2 QFP32 PCB Land Pattern 9.3 QFP32 Package Marking 10. Revision History 10.1 Revision 1.2 10.2 Revision 1.1 Table of Contents