1 Ω , Low-Voltage, Single-SupplySPDT Analog SwitchesMAX4624/MAX4625 a small-signal diode (D1) as shown in Figure 1. If the Protection diodes D1 and D2 also protect against some analog signal can dip below GND, add D2. Adding overvoltage situations. With Figure 1’s circuit, if the sup- protection diodes reduces the analog range to a diode ply voltage is below the absolute maximum rating, and drop (about 0.7V) below V+ (for D1), and a diode drop if a fault voltage up to the absolute maximum rating is above ground (for D2). On-resistance increases slightly applied to an analog signal pin, no damage will result. at low supply voltages. Maximum supply voltage (V+) must not exceed +6V. Adding protection diode D2 causes the logic threshold to be shifted relative to GND. TTL compatibility is not guaranteed when D2 is added. Test Circuits/Timing Diagrams MAX4624 V+ tr < 5ns MAX4625 VINH t LOGIC f < 5ns 50% V+ INPUT VINL NO COM VIN_ V OR NC OUT RL CL tOFF 50Ω 35pF IN VOUT 0.9 · V0UT 0.9 · VOUT LOGIC GND SWITCH 0V INPUT OUTPUT tON CL INCLUDES FIXTURE AND STRAY CAPACITANCE. LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES V THAT HAVE THE OPPOSITE LOGIC SENSE. OUT = VN_ ( RL ) RL + RON Figure 2. Switching Time V+ MAX4624 VINH LOGIC 50% V+ INPUT VINL NC V V N_ OUT COM NO RL CL 50Ω IN 35pF LOGIC GND INPUT V 0.9 · V OUT OUT tD CL INCLUDES FIXTURE AND STRAY CAPACITANCE. Figure 3a. Break-Before-Make Interval (MAX4624 only) _______________________________________________________________________________________7
