Datasheet IRFP240 (Vishay) - 5

IRFP240
www.vishay.com Vishay Siliconix L V V DS DS Vary tp to obtain t required I p AS VDD R D.U.T G + V - DD V I DS AS 10 V t 0.01 p Ω IAS
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T. Q 50 kΩ G 10 V 12 V 0.2 µF 0.3 µF Q Q GS GD + V D.U.T. DS - VG VGS 3 mA Charge I I G D Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
S22-0046, Rev. C, 24-Jan-2021
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