Datasheet NCP565, NCV565 (ON Semiconductor) - 2

NCP565, NCV565
Vin Vin Vout Vout Vin Vin Vout Vout NCP565 NCP565 C1 R1 5.6 pF GND GND ADJ Cin Cout Cin Cout R2
Figure 1. Typical Application Schematic, Figure 2. Typical Application Schematic, Fixed Output Adjustable Output PIN DESCRIPTION D2PAK 5 D2PAK 3 DFN6 SOT−223 Pin No. Pin No. Pin No. Pin No. Pin No. Adj. Version Fixed Version Adj. Version Fixed Version Fixed Version Symbol Description
1 − 1, 2 1, 2, 5 − N.C. − 2 1 3 3 3 Vin Positive Power Supply Input Voltage 3, Tab 2, Tab 6 6 1 Ground Power Supply Ground 4 3 4 4 2, Tab Vout Regulated Output Voltage 5 − 5 − − Adj This pin is to be connected to the sense resistors on the output. The linear regulator will attempt to maintain 0.9 V between this pin and ground. Refer to the Application Information section for output voltage setting. Vin Vout Vin Vout Vref = 0.9 V Vref = 0.9 V Output Current Output Current Stage Limit Stage Limit Voltage Sense Voltage Sense Reference Reference Block Block ADJ Thermal Thermal Shutdown Shutdown Block Block GND GND
Figure 3. Block Diagram, Fixed Output Figure 4. Block Diagram, Adjustable Output www.onsemi.com 2