Datasheet BL8506 (Belling) - 8

BL8506 BLOCK DIAGRAM
VDD VDD VOUT
_ _
V Vref
+
OUT Vref
+
VSS VSS N-channel Open-drain CMOS Output
FUNCTION DESCRIPTION
VDD Rd Ra
_
VOUT Vref
+
Rb Comparator Rc VSS A high precision, low temperature coefficient reference voltage is applied to the positive input of the comparator. Input voltage, divided by resistor array of Ra, Rb and Rc, is applied to the negative input of the comparator. The output of the comparator controls a pair of PMOS and NMOS switches, generating the hysteresis. The output of the comparator passes a series of buffer to drive the output CMOS pair. +VDET, -VDET, VHYS can be calculated as follows: -VDET =VREF*[1+Ra/(Rb+Rc)] +VDET =VREF*[1+(Ra+Rd)/Rb] =VREF*[1+(Ra+Rc)/Rb] VHYS =+VDET - (-VDET) =VREF*(Ra+Rb+Rc)*[1/Rb-1/(Rb+Rc)]
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