Datasheet DS4305 (Analog Devices) - 8

Electronically Programmable Voltage Reference Layout Considerations Chip Topology
To prevent an inadvertent programming cycle from TRANSISTOR COUNT: 6016 occurring during power-up, minimize capacitive load- ing on the ADJ pin. A large capacitance on this pin SUBSTRATE CONNECTED TO GROUND could potentially hold ADJ in a low state long enough that a programming cycle is initiated.
DS4305 Power-Supply Decoupling Package Information
To achieve best results, it is highly recommended that For the latest package outline information, go to a decoupling capacitor is used on the IC power-supply
www.maxim-ic.com/DallasPackInfo.
pin. Typical values of decoupling capacitors are 0.01µF or 0.1µF. Use a high-quality, ceramic, surface-mount capacitor, and mount it as close as possible to the VCC and GND pins of the IC to minimize lead inductance.
Revision History
Pages changed at Rev1: 1 Title changes—all pages Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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