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Datasheet LM4050, LM4051 (Analog Devices) - 2

ПроизводительAnalog Devices
Описание50ppm/°C Precision Micropower Shunt Voltage References with Multiple Reverse Breakdown Voltages
Страниц / Страница14 / 2 — LM4050/LM4051. Absolute Maximum Ratings. Package Information. 3 SOT23. …
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LM4050/LM4051. Absolute Maximum Ratings. Package Information. 3 SOT23. PACKAGE CODE. U3+1. 21-0051. 90-0179

LM4050/LM4051 Absolute Maximum Ratings Package Information 3 SOT23 PACKAGE CODE U3+1 21-0051 90-0179

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LM4050/LM4051
50ppm/°C Precision Micropower Shunt Voltage References with Multiple Reverse Breakdown Voltages
Absolute Maximum Ratings
Reverse Current (cathode to anode)..20mA Operating Temperature Range Forward Current (anode to cathode) ..10mA LM4050/LM4051_E_ _ _ .. -40°C to +125°C Continuous Power Dissipation (TA = +70°C) Storage Temperature Range .. -65°C to +150°C 3-Pin SC70 (derate 2.9mW/°C above +70°C) ..235.3mW Junction Temperature ..+150°C 3-Pin SOT23 (derate 3mW/°C above +70°C) ..238.1mW Lead Temperature (soldering, 10s)..+300°C Soldering Temperature (reflow) ...+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information 3 SOT23 PACKAGE CODE U3+1
Outline Number
21-0051
Land Pattern Number
90-0179 Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA) 336°C/W Junction to Case (θJC) 110.10°C/W
3 SC70 PACKAGE CODE X3+2
Outline Number
21-0075
Land Pattern Number
90-0208 Thermal Resistance, Four-Layer Board:
Junction to Ambient (θJA) 340.40°C/W Junction to Case (θJC) 120°C/W For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages
. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial
. www.analog.com Analog Devices │ 2
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