Datasheet FL7740 (ON Semiconductor) - 9

FL7740 APPLICATION INFORMATION General
sophisticated digital PF optimizer, FL7740 significantly FL7740 is high power factor flyback controller with improves power factor in the wide load range. accurate primary side constant voltage regulation for smart LED lighting and ac−dc adapter, TV & monitors application.
Pulse−By−Pulse Current Limit
Precise output voltage detection and dynamic function When CS pin voltage reaches to 1.2 V current limit manage good CV regulation. Startup is fast with internal HV reference, GATE turn−on is terminated to limit primary peak biasing circuit with overshoot−less gain control. It current. guarantees high system reliable protection functions such as
Auto Restart at Protection
output over voltage, output short, over load, over current and Once protection is triggered, IC operation stops for 3 sec thermal shut down protections. and begin the operation for auto restart.
Constant Voltage Regulation Output Short Protection
VS pin detects output voltage information (= VEAV) When V during secondary side diode conduction time and internal EAV is less than 0.7 V continuously for 35 ms, output short protection is triggered. gm amplifier regulates the detected voltage at 3.5 V.
Output Over Voltage Protection Dynamic Response at Load Transient
When V At load transient condition, V EAV is higher than VVS−OVP threshold or VDD is EAV is shortly out of higher than V regulation due to the narrow PFC loop bandwidth. When DD−OVP, output over voltage protection is triggered. VEAV is far from 3.5 V regulation reference, duty is quickly changed to bring the VEAV back to 3.5 V by dynamic control
Output Diode Short Protection
function. Once output diode is short circuited, high di/dt in the primary winding is occurred by leakage inductance. Once
HV Biasing at Startup
CS pin voltage reaches to 1.7 V, switching is shut down. Internal HV biasing circuit quickly charges external VDD capacitor to begin IC operation at plug−in. After 500 ms
Sensing Resistor Short Protection
initial time, HV biasing stops for low standby power. At first switching, sensing resistor short condition is monitored by detecting CS pin voltage. If CS is less
Overshoot−Less Gain Control at Startup
than 75 mV during first GATE turn−on time, sensing Once IC operation starts, feedback loop is dominantly resistor short protection is triggered. controlled in proportional gain to speed up the output capacitor charging. Once output voltage is settled down
Over Load Protection
close to the regulation target, gain control is smoothly When output is over loaded, pulse−by−pulse current limit changed to integration gain with no output voltage event is occurred. If this event lasts for 60 half line cycles, overshoot. over load protection is triggered.
Digital PF Optimizer Thermal Shut Down
FL7740 compensates input current phase shift caused by If internal junction temperature is higher than 150°C, EMI filter capacitor current in a half line period. With protection is triggered and released with 30°C hysteresis.
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