Datasheet OPA206, OPA2206, OPA4206 (Texas Instruments) - 6

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OPA206, OP A2206, OP A4206
SBOSA11E – MARCH 2020 – REVISED DECEMBER 2023
www.ti.com 5.4 Thermal Information: OPA206 OPA206 THERMAL METRIC
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D (SOIC) UNIT 8 PINS
RθJA Junction-to-ambient thermal resistance 129.6 ℃/W RθJC(top) Junction-to-case (top) thermal resistance 69.9 ℃/W RθJB Junction-to-board thermal resistance 73.0 ℃/W ψJT Junction-to-top characterization parameter 21.2 ℃/W ψJB Junction-to-board characterization parameter 72.2 ℃/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A ℃/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
5.5 Thermal Information: OPA2206 OPA2206 THERMAL METRIC
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D (SOIC) DGK (VSSOP) UNIT 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 124.8 175.6 ℃/W RθJC(top) Junction-to-case (top) thermal resistance 64.9 63.1 ℃/W RθJB Junction-to-board thermal resistance 68.1 97.2 ℃/W ψJT Junction-to-top characterization parameter 17.1 7.8 ℃/W ψJB Junction-to-board characterization parameter 67.4 95.5 ℃/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A ℃/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
5.6 Thermal Information: OPA4206 OPA4206 THERMAL METRIC
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D (SOIC) PW (TSSOP) UNIT 14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 71.5 96.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 28.9 25.7 °C/W RθJB Junction-to-board thermal resistance 33.7 54.0 °C/W ψJT Junction-to-top characterization parameter 6.3 2.1 °C/W ψJB Junction-to-board characterization parameter 33.2 53.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: OPA206 OPA2206 OPA4206 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information: OPA206 5.5 Thermal Information: OPA2206 5.6 Thermal Information: OPA4206 5.7 Electrical Characteristics: VS = ±5 V 5.8 Electrical Characteristics: VS = ±15 V 5.9 Typical Characteristics 6 Parameter Measurement Information 6.1 Typical Specifications and Distributions 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Input Overvoltage Protection 7.3.2 Input Offset Trimming 7.3.3 Lower Input Bias With Super-Beta Inputs 7.3.4 Overload Power Limiter 7.3.5 EMI Rejection 7.4 Device Functional Modes 8 Application and Implementation 8.1 Application Information 8.2 Typical Applications 8.2.1 Voltage Attenuator 8.2.1.1 Design Requirements 8.2.1.2 Detailed Design Procedure 8.2.1.3 Application Curves 8.2.2 Discrete, Two-Op-Amp Instrumentation Amplifier 8.2.3 Input Buffer and Protection for ADC Driver 8.3 Power Supply Recommendations 8.4 Layout 8.4.1 Layout Guidelines 8.4.2 Layout Example 9 Device and Documentation Support 9.1 Device Support 9.1.1 Development Support 9.1.1.1 PSpice® for TI 9.2 Documentation Support 9.2.1 Related Documentation 9.3 Receiving Notification of Documentation Updates 9.4 Support Resources 9.5 Trademarks 9.6 Electrostatic Discharge Caution 9.7 Glossary 10 Revision History 11 Mechanical, Packaging, and Orderable Information