Datasheet MAX4480, MAX4481, MAX4482, MAX4483 (Analog Devices) - 3

MAX4480–MAX4483 Single/Dual/Quad, Low-Cost, Single-Supply, Rail-to-Rail Op Amps with Shutdown
Electrical Characteristics (continued)
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL ≥ 1MΩ connected to VDD/2, SHDN = VDD (MAX4481 only),
TA = +25°C
, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Phase Margin φM 70 degrees Gain Margin 30 dB Slew Rate SR 80 V/ms Input Voltage Noise Density en f = 10kHz 100 nV/√Hz Input Current Noise Density in f = 10kHz 1 nV/√Hz Capacitive-Load Stability CLOAD AV = +1V/V 400 pF Shutdown Delay Time tSHDN MAX4481 only 0.4 μs Enable Delay Time tEN MAX4481 only 12 μs Power-On Time tON 15 μs Input Capacitance CIN 2.0 pF Total Harmonic Distortion THD f = 1kHz, VOUT = 2VP-P, AV = +1V/V RL = 100kΩ 0.005 % Settling Time to 0.1% tS VOUT = 2V step 50 μs
Electrical Characteristics
(VDD = +5V, VSS = 0V, VCM = 0V, VOUT = VDD/2, RL ≥ 1MΩ connected to VDD/2, SHDN = VDD (MAX4481 only),
TA = -40°C to +125°C
, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage Range VDD Inferred from PSRR test 2.5 5.5 V Supply Current per Amplifier IDD 120 μA Supply Current in Shutdown ISHDN SHDN = VSS (MAX4481 only) 1.0 μA Input Offset Voltage VOS 9 mV Input Offset Voltage Drift TCVOS ±3 μV/°C Input Bias Current IB (Note 1) ±100 pA Input Offset Current IOS (Note 1) ±100 pA Input Common-Mode Voltage VDD - Range VCM Inferred from CMRR test VSS 1.4 V Common-Mode Rejection Ratio CMRR VSS ≤ VCM ≤ VDD - 1.4V 67 dB Power-Supply Rejection Ratio PSRR 2.5V ≤ VDD ≤ 5.5V 77 dB Device in shutdown -40°C to +85°C ±0.5 Shutdown Mode Output Leakage I mode, SHDN = VSS, OUTSHDN V μA SS < VOUT < VCC (MAX4481 only) +85°C to +125°C ±2.5 SHDN Logic Low VIL MAX4481 only 0.3 x VDD V SHDN Logic High VIH MAX4481 only 0.7 x VDD V SHDN Input Current IIL, IIH SHDN = VDD or VSS (MAX4481 only) 1 µA Large-Signal Voltage Gain AVOL VSS + 0.1V ≤ VOUT ≤ VDD - 0.20V, RL = 5kΩ 84 dB Output Voltage High VOH Specified as VDD - VOUT, RL = 5kΩ 200 mV Output Voltage Low VOL Specified as VOUT - VSS, RL = 5kΩ 50 mV
Note 1:
Guaranteed by design.
Note 2:
Specifications are 100% tested at TA = +25°C (exceptions noted). All temperature limits are guaranteed by design. www.maximintegrated.com Maxim Integrated │ 3