VIA0050DD www.vishay.com Vishay Semiconductors ELECTRICAL CHARACTERISTICS: VIA0050DD (VDD1, VDD2 = 3 V to 5.5 V, INP = -50 mV to +50 mV, INN = GND1 = 0 V, Tamb = -40 °C to +125 °C) (VDD1 = 5 V, VDD2 = 3.3 V, Tamb = 25 °C, unless otherwise specified) PARAMETERTEST CONDITIONSYMBOLMIN.TYP.MAX.UNITPOWER SUPPLY Side 1 supply voltage VDD1 3.0 5.0 5.5 V Side 2 supply voltage VDD2 3.0 3.3 5.5 V Side 1 supply current IDD1 - 11.4 15.1 mA Side 2 supply current IDD2 - 6.3 8.4 mA VDD1 undervoltage detection V threshold voltage DD1 falling VDD1_UV 1.8 2.3 2.7 V ANALOG INPUT Common-mode overvoltage Detection level has a typical hysteresis V detection level of 96 mV CMov 0.9 - - V Input offset voltage INP = INN = GND1 VOS -0.1 ± 0.01 +0.1 mV Input offset drift TCVOS -0.8 ± 0.15 +1 μV/°C INP = INN, fIN = 0 Hz, VCM min. ≤ VIN ≤ VCM max. CMRRDC - -120 - dB Common-mode rejection ratio INP = INN, fIN = 10 Hz, VCM min. ≤ VIN ≤ VCM max. CMRRAC - -112 - dB Single-ended input resistance INN = GND1 RIN - 4.75 - kΩ Differential input resistance RIND - 4.9 - kΩ Input capacitance CI - 2 - pF Input bias current INP = INN = GND1, IIB = (IIBP + IIBN)/2 IIB -29 -22 -14 μA Input bias current drift TCIIB - ± 1.5 - nA/°C ANALOG OUTPUT Nominal gain - 41 - V/V Gain error EG -0.3 ± 0.05 +0.3 % Gain error thermal drift TCEG -50 ± 15 +50 ppm/°C Non-linearity -0.03 ± 0.01 +0.03 % Non-linearity drift - ± 1 - ppm/°C Total harmonic distortion VIN = 100 mVpp, fIN = 10 kHz, BW = 100 kHz THD -85 - dB Output noise INP = INN = GND1, BW = 100 kHz - 260 - μVRMS VIN = 100 mVpp, fIN = 1 kHz, BW = 10 kHz 80 84 - dB Signal to noise ratio SNR VIN = 100 mVpp, fIN = 10 kHz, BW = 100 kHz - 72 - dB Common-mode output voltage VCMout 1.39 1.44 1.49 V Fail-safe differential output voltage VCM > VCMov, or VDD1 missing VFail-Safe - -2.6 -2.5 V Output bandwidth BW 250 310 - kHz PSRR vs. VDD1, at DC PSRRDC - -118 - dB PSRR vs. VDD1, 100 mV and 10 kHz ripple PSRRAC - -116 - dB Power supply rejection ratio (1) PSRR vs. VDD2, at DC PSRRDC - -108 - dB PSRR vs. VDD2, 100 mV and 10 kHz ripple PSRRAC - -97 - dB Output resistance ROUT - < 0.2 - Ω Output short-circuit current IOUT.OC - ± 13 - mA Common-mode transient CMTI 100 150 - kV/μs immunity TIMING Rising time of OUTP, OUTN tr - 1.3 - μs Falling time of OUTP, OUTN tf - 1.3 - μs INP, INN to OUTP, OUTN signal t delay (50 % to 50 %) PD - 1.6 2.1 μs V Analog setting time DD1 step to 3.0 V with VDD2 ≥ 3.0 V, t to OUT AS - 0.5 - ms P, OUTN valid, 0.1 % settling Note (1) Input referred Rev. 1.2, 02-Apr-2025 4 Document Number: 80900 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
