VIA0050DD www.vishay.com Vishay Semiconductors Axis Title Axis Title 0 10000 3.0 10000 B) (d -20 tio 2.5 VOUT_N ) Ra -40 (V 1000 2.0 1000 ction ltage -60 o ne ne V ne ne ine ine Reje 1.5 ly -80 1st li 2nd li 1st li 2nd li 2nd l pp 2nd l PSRR at VDD2 100 r Su 1.0 100 - Output e -100 OUTV Pow 0.5 -120 PSRR at VDD1 VOUT_P PSRR - -140 10 0 10 0.1 1 10 100 1000 -400 -200 0 200 400 f - Frequency (kHz) V - Input Voltage (V) IN Fig. 19 - Power Supply Rejection Ratio vs. Ripple Frequency Fig. 21 - Output Voltage vs. Input Voltage Axis Title 14 10000 I at V = 5.5 V DD1 DD1 12 ) A 10 (m I at V = 3 V DD1 DD1 1000 rrent 8 u I at V = 5.5 V DD2 DD2 ne ne ine C y 6 1st li 2nd li 2nd l uppl I at V = 3 V DD2 DD2 100 S 4 - I DD 2 0 10 -40 -20 0 20 40 60 80 100 120 T - Ambient Temperature (°C) amb Fig. 20 - Supply Current vs. Ambient Temperature PARAMETER MEASUREMENT INFORMATION 3.3 V V V DD1 DD2 IN OUT P P Differential Battery probe IN OUT N N GND GND 1 2 Oscilloscope High voltage probe VCM Fig. 22 - Common-Mode Transient Immunity Test Circuit Rev. 1.2, 02-Apr-2025 8 Document Number: 80900 For technical questions, contact: optocoupleranswers@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
