Datasheet MAX32625 (Analog Devices) - 2

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TABLE OF CONTENTS
General Description . 1 Applications . 1 Benefits and Features . 1 Simplified Block Diagram. 4 Absolute Maximum Ratings . 5 Package Information . 5 63 WLP . 5 68 TQFN . 5 Electrical Characteristics . 6 Electrical Characteristics—ADC . 10 Electrical Characteristics—USB . .11 Electrical Characteristics—SPI Master / SPIX Master . 12 Electrical Characteristics—SPI Slave . 13 Electrical Characteristics—I2C Bus. 13 Pin Configurations . 14 Pin Description . 16 Detailed Description. 19 MAX32625/MAX32626 . 19 ARM Cortex-M4 with FPU Processor. 19 Power Operating Modes . 19 Low Power Mode 0 (LP0) . 19 Low Power Mode 1 (LP1). 19 Low Power Mode 2 (LP2) . 19 Low Power Mode 3 (LP3) . 19 Analog-to-Digital Converter . 19 Pulse Train Engine . 20 Clocking Scheme . 20 Interrupt Sources . 21 Real-Time Clock and Wake-Up Timer . 21 General-Purpose I/O and Special Function Pins . 21 CRC Module . 21 Watchdog Timers . 21 Programmable Timers. 22 Serial Peripherals . 22 USB . 22 I2C Master and Slave. 23 SPI (Master) . 23 www.maximintegrated.com Maxim Integrated │ 2 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 63 WLP 68 TQFN Electrical Characteristics Electrical Characteristics - ADC Electrical Characteristics - USB Electrical Characteristics - SPI Master / SPIX Master Electrical Characteristics - SPI Slave Electrical Characteristics - I2C Bus Pin Configurations Pin Description Detailed Description MAX32625/MAX32626 ARM Cortex-M4 with FPU Processor Power Operating Modes Low Power Mode 0 (LP0) Low Power Mode 1 (LP1) Low Power Mode 2 (LP2) Low Power Mode 3 (LP3) Analog-to-Digital Converter Pulse Train Engine Clocking Scheme Interrupt Sources Real-Time Clock and Wake-Up Timer General-Purpose I/O and Special Function Pins CRC Module Watchdog Timers Programmable Timers Serial Peripherals USB I2C Master and Slave SPI (Master) SPI (Slave) SPI (Execute in Place (SPIX) Master) UART 1-Wire Master Peripheral Management Unit (PMU) Additional Documentation Development and Technical Support Trust Protection Unit (TPU) (MAX32626 Only) Applications Information General-Purpose I/O Matrix Typical Application Circuit Ordering Information Revision History