Datasheet TB9M001FTG (Toshiba) - 10

Preliminary
TB9M001FTG CPU PMU LINMODE APB LINWAKEUP P T X X U B S T R W LINPHY AP IN IN IN IN _L _L _L _L Q Q Q Q IR IR IR IR LINCNT/UART1 LINCNT UART1 Wakeup Detect AMBA RXD APB Transmit/ RXD RXD RXD Control Interface Receive Status and Control LINBUS LIN Register UNIT TXD PCLK block TXD TXD TXD LINCLK Interrupt Break/Sync generation detector time checksum measurement calculator counter
Figure 9.3.1 LINCNT/UART1 Block Diagram
© 2025 10 2025-05-30 Toshiba Electronic Devices & Storage Corporation Rev. 1.0 Document Outline 1. Description 2. Applications 3. Features 4. Functions 5. Block Diagram 6. Pin Assignments 7. Pin Description 8. I/O Equivalent Circuits 9. Functional Description 9.1. CPU 9.1.1. Overview 9.1.2. Arm® Cortex®-M0 Processor 9.1.3. Configurable Options 9.1.4. External Signals 9.1.5. Module Organization 9.2. LINPHY 9.3. LINCNT/UART1 9.4. SPI 9.4.1. External Signals 9.5. GPIO 9.6. 10bit Analog Digital Converter (GADC) 9.7. Low Side Drivers (LSD) 9.8. High Side Drivers (HSD) 9.9. High Voltage Inputs (HVIF) 9.10. Memory Map 10. Electrical Characteristics 10.1. Absolute Maximum Ratings 10.2. Operating Ranges 10.3. Overall Electrical Characteristics 10.4. 5-V/1.5-V Regulator (LDO5V/LDO15V) 10.5. Switch and Hall Sensor IC Inputs（High Voltage Inputs） 10.6. Oscillator 10.7. Reset Generator and Standby Time 10.8. Data Flash 10.9. Program Flash 10.10. LIN 10.11. 12-V High-Side Driver (HSD_VB) 10.12. 5-V High-Side Driver (HSD_VCC) 10.13. Low-Side Drivers 10.14. 10-Bit AD 10.15. DC characteristics 10.16. SPI 10.17. UART 11. Application Circuit Example 12. Package Information 12.1. Package Dimensions 12.2. Marking 13. IC Usage Considerations 13.1. Notes on Handling of ICs 13.2. Points to Remember on Handling of ICs RESTRICTIONS ON PRODUCT USE