Datasheet PSMN9R0-30YL (Nexperia)

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PSMN9R0-30YL AK LFP N-channel 30 V 8 mΩ logic level MOSFET in LFPAK Rev. 04 — 9 March 2011 Product data sheet 1. Product profile 1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in industrial and communications applications.
1.2 Features and benefits
High efficiency due to low switching Suitable for logic level gate drive and conduction losses sources
1.3 Applications
Class-D amplifiers Motor control DC-to-DC converters Server power supplies
1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 30 V ID drain current Tmb = 25 °C; VGS = 10 V; - - 61 A see Figure 1; see Figure 3 Ptot total power Tmb = 25 °C; see Figure 2 - - 46 W dissipation Tj junction temperature -55 - 175 °C
Static characteristics
RDSon drain-source on-state VGS = 10 V; ID = 15 A; - 6.16 8 mΩ resistance Tj = 25 °C
Dynamic characteristics
QGD gate-drain charge VGS = 4.5 V; ID = 10 A; - 2.4 - nC VDS = 12 V; see Figure 14; see Figure 15 QG(tot) total gate charge VGS = 4.5 V; ID = 10 A; - 8.7 - nC VDS = 12 V; see Figure 14
Avalanche ruggedness
EDS(AL)S non-repetitive VGS = 10 V; Tj(init) = 25 °C; - - 16 mJ drain-source ID = 55 A; Vsup ≤ 30 V; avalanche energy RGS = 50 Ω; unclamped Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents