DATA SHEETSKY53510/SKY53580/SKY53540Table 1. SKY53510 7x7mm 48-QFN Pin Descriptions (Continued)PinNameType1Description Output signal format control pin for Bank A 14 SFOUTA0 I SFOUTA0 contains an internal pull-down resistor. Core voltage supply. 15 VDD P Bypass with 0.1 µF capacitor placed as close to the VDD pin as possible. 16 XA I Crystal input. Can also be driven by a XO, TCXO, or other external single-ended clock. 17 XB O Crystal output. When a crystal is not used, and XA is used as an input, this pin should be left floating. 18 GND GND Ground Mux input select pin 19 CLK_SEL0 I CLK_SEL0 contains an internal pull-down resistor. 20 CLK0 I Input Clock 0 21 CLK0b I Input Clock 0 (complement). 22 CLK_SEL1 I Mux input select pin CLK_SEL1 contains an internal pull-down resistor. 23 SFOUTB0 I Output signal format control pin for Bank B. SFOUTB0 contains an internal pull-down resistor. 24 GND GND Ground 25 Q9b O Output Clock 9 (complement) 26 Q9 O Output Clock 9 27 Q8b O Output Clock 8 (complement) 28 Q8 O Output Clock 8 Output voltage supply—Bank B (Outputs: Q5 to Q9) 29 VDDOB P Bypass with 0.1 µF capacitor and place as close to the VDDOB pin as possible. 30 Q7b O Output Clock 7 (complement) 31 Q7 O Output Clock 7 32 VDDOB P Output voltage supply—Bank B (Outputs: Q5 to Q9) Bypass with 0.1 µF capacitor and place as close to the VDDOB pin as possible. 33 Q6b O Output Clock 6 (complement). 34 Q6 O Output Clock 6. 35 Q5b O Output Clock 5 (complement) 36 Q5 O Output Clock 5 37 GND GND Ground 38 NC - No connect. Leave this pin floating. 39 SFOUTB1 I Output signal format control pin for Bank B. SFOUTB1 contains an internal pull-down resistor. 40 CLK1b I Input Clock 1 (complement). 41 CLK1 I Input Clock 1. Core voltage supply. 42 VDD P Bypass with 0.1 µF capacitor placed as close to the VDD pin as possible. 43 GND GND Ground. 44 REFOUT O LVCMOS reference output clock. Enable this output by pulling pin 46 high. Skyworks Solutions, Inc. • Phone [949] 231-3000 • sales@skyworksinc.com • www.skyworksinc.com 207106A • Skyworks Proprietary Information • Products and Product Information are Subject to Change without Notice 4 August 1, 2025 Document Outline Key Features 1. Pin Descriptions 1.1. SKY53510 7x7 mm 48-QFN Pin Descriptions 1.2. SKY53580 6x6 mm 40-QFN Pin Descriptions 1.3. SKY53540 5x5 mm 32-QFN Pin Descriptions 2. Detailed Description 2.1. Overview 2.2. Block Diagrams 2.3. Modes of Operation 2.3.1. Input Clock Stage 2.3.2. Clock Outputs 3. Applications Information 3.1. Driving Clock Inputs (CLK0/CLK1) 3.2. Crystal Interface (XA/XB) 3.3. Clock Output Termination 3.3.1. DC-Coupled Differential Output Driver Terminations 3.3.2. AC-Coupled Differential Output Driver Terminations 4. Power Supply (VDD and VDDOx) 4.1. Power Supply Sequencing 5. Electrical Specifications 6. Typical Performance Characteristics 7. Package and Handling Information 7.1. 48-QFN Package Diagram 7.2. 40-QFN Package Diagram 7.3. 32-QFN Package Diagram 8. Land Patterns 8.1. 48-QFN Land Pattern 8.2. 40-QFN Land Pattern 8.3. 32-QFN Land Pattern 9. Top Markings 9.1. SKY53510/80/40 Top Markings 10. Ordering Guide 11. Revision History
