Datasheet SN74LVC1G16 (Texas Instruments) - 5

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SN74LVC1G16 www.ti.com
SCLSA29B – OCTOBER 2024 – REVISED MAY 2025 over operating free-air temperature range (unless otherwise noted)
Specifications Description Condition MIN MAX UNIT
TA Operating free-air temperature -40 125 °C
5.4 Thermal Information THERMAL METRIC
(1)
PACKAGE PINS UNIT RθJA RθJC(top) RθJB ΨJT ΨJB RθJC(bot)
DBV (SOT-23, 5) 5 357.1 263.7 264.4 195.6 262.2 - °C/W DCK (SOT-SC70, 5) 5 371.0 297.5 258.6 195.6 256.2 - °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.
5.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
-40°C to 125°C PARAMETER TEST CONDITIONS VCC UNIT MIN TYP MAX
VT+ Positive-going input threshold voltage 1.65 V 0.76 1.08 1.16 V VT+ Positive-going input threshold voltage 2.3 V 1.08 1.35 1.56 V VT+ Positive-going input threshold voltage 3 V 1.3 1.66 1.92 V VT+ Positive-going input threshold voltage 4.5 V 2.16 2.37 2.74 V VT+ Positive-going input threshold voltage 5.5 V 2.61 2.86 3.33 V VT- Negative-going input threshold voltage 1.65 V 0.35 0.57 0.7 V VT- Negative-going input threshold voltage 2.3 V 0.56 0.79 0.89 V VT- Negative-going input threshold voltage 3 V 0.84 1.04 1.2 V VT- Negative-going input threshold voltage 4.5 V 1.41 1.59 1.97 V VT- Negative-going input threshold voltage 5.5 V 1.71 1.94 2.4 V ΔVT Hysteresis (VT+ − VT−) 1.65 V 0.3 0.52 0.8 V ΔVT Hysteresis (VT+ − VT−) 2.3 V 0.4 0.56 0.78 V ΔVT Hysteresis (VT+ − VT−) 3 V 0.4 0.62 0.87 V ΔVT Hysteresis (VT+ − VT−) 4.5 V 0.58 0.78 1.04 V ΔVT Hysteresis (VT+ − VT−) 5.5 V 0.69 0.91 1.14 V Over Recommended VOL IOL= 100 μA 0.2 V Operating Conditions VOL IOL= 4 mA 1.65 V 0.45 V VOL IOL= 8 mA 2.3 V 0.3 V VOL IOL= 12 mA 2.7 V 0.4 V VOL IOL= 16 mA 3 V 0.4 V VOL IOL= 24 mA 3 V 0.55 V VOL IOL= 32 mA 4.5 V 0.55 V II VI = VCC or GND VCC = 0V to 5.5 V ±1 ±5 µA Ioff VI or VO = VCC VCC = 0 V ±1 ±10 µA ICC VI = VCC or GND, IO = 0 VCC = 1.65 V to 5.5 V 1 10 µA One input at V ΔI CC - 0.6 V, other inputs at CC 3.0 V to 5.5 V 500 µA VCC or GND CI VI = VCC or GND 3.3 V 3.5 pF CO VO = VCC or GND 3.3 V 6.3 pF Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: SN74LVC1G16 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Pin Configuration and Functions 5 Specifications 5.1 Absolute Maximum Ratings 5.2 ESD Ratings 5.3 Recommended Operating Conditions 5.4 Thermal Information 5.5 Electrical Characteristics 5.6 Switching Characteristics 5.7 Typical Characteristics 6 Parameter Measurement Information 7 Overview 8 Functional Block Diagram 9 Detailed Description 9.1 Feature Description 9.1.1 Open-Drain CMOS Outputs 9.1.2 CMOS Schmitt-Trigger Inputs 9.1.3 Clamp Diode Structure 10 Application and Implementation 10.1 Application Information 10.2 Typical Application 10.2.1 Design Requirements 10.2.1.1 Power Considerations 10.2.1.2 Input Considerations 10.2.1.3 Output Considerations 10.2.2 Detailed Design Procedure 10.3 Application Curves 10.4 Power Supply Recommendations 10.5 Layout 10.5.1 Layout Guidelines 10.5.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Revision History 13 Mechanical, Packaging, and Orderable Information