Datasheet TB9084FTG (Toshiba)

TB9084FTG Toshiba Bi-CMOS Linear Integrated Circuits Silicon Monolithic
TB9084FTG
Automotive Gate Driver for Brushless Motor
1. Description
TB9084FTG is a gate driver IC for automotive brushless motors. It is equipped with a charge pump, motor current sensing circuit, oscillation circuit, SPI communication circuit, and multiple types of abnormality detection circuits. In addition, it allows abnormality detection conditions and reaction operation, after abnormality detection to be set by using SPI communication. P-VQFN36-0606-0.50
2. Applications
Weight: 95 mg (typ.) Motor generators, electric oil pumps. Automotive body system applications such as power sliding doors, and power tail gates.
3. Features
⚫ Used in a 12V battery system and a jump start environment (Operating voltage range: VB = 5.7 to 28V) ⚫ MCU with 5V and 3.3V system IO ports controls this product (Operating voltage range: VCC = 3.0 to 5.5V) ⚫ Low reset current at VCC=0V to prevent the battery from running out ⚫ Can be used in a temperature environment for mechanically and electrically integrated type. ⚫ Built-in charge pump circuit (VCP). ⚫ Built-in gate drivers for driving 3-phase FETs (PWM control, up to 20kHz) ⚫ Built-in gate driver (high-side switch) for driving a FET for reverse polarity protection (RPPO) ⚫ Built-in motor current sensing circuit ⚫ Built-in oscillation circuit, 4MHz(Typ.) ⚫ Various built-in abnormality detection circuits VB, VCC, RPPO under voltage/VCC, VCP over voltage/Over temperature/VDS detection of 3-phase FET /Short to VB or GND fault detection for charge pump drive terminals (CP1SW, CP2SW) /SPI communication abnormality detection ⚫ Built-in input circuit for gate driver emergency stop (ALRAM) ⚫ Built-in SPI communication circuit ⚫ Ambient temperature (Ta) = -40 to 150°C, Junction temperature (Tj) = -40 to 175°C ⚫ Package: P-VQFN36-0606-0.50 (Wettable flank, 0.5mm pitch) ⚫ AEC-Q100 (Rev-J), Q006 (Rev-A): Grade 0 Start of commercial production 2025-08 © 2 025 1 2025-07-31 Toshiba Electronic Devices & Storage Corporation Rev. 3.0 Document Outline 1. Description 2. Applications 3. Features 4. Block Diagram 5. Pin Assignments Top view 6. Pin Description 7. Functional Description 7.1. Charge Pump Circuit 7.2. Gate Driver Circuits 7.2.1. Gate Drivers for Driving 3-Phase FETs 7.2.2. Gate Driver for FET for Reverse Polarity Protection 7.3. Current Sensing Circuit 7.3.1. Configuration 7.3.2. Offset Calibration 7.4. Oscillation Circuit 7.5. Abnormality Flag Output Function 7.5.1. NDIAG Terminal Output 7.5.2. Status Registers in SPI communication 7.6. Abnormality Detection Circuits 7.6.1. VCC Under Voltage Detection Function 7.6.2. VB Under Voltage Detection Function 7.6.3. RPPO Under Voltage Detection Function 7.6.4. VCC Over Voltage Detection Function 7.6.5. VCP Over Voltage Detection Function 7.6.6. Over temperature Detection Function 7.6.7. VDS Detection Function for 3-Phase FETs 7.6.8. Abnormality Detection for CP1SW and CP2SW Terminals 7.7. Alarm Input Circuit 7.8. SPI Communication Circuit 7.8.1. SPI Communication Operation 7.8.2. Error Judgment 7.8.3. Register Map 7.8.3.1. CONFIG1 Write Address=2h / Read Address=3h 7.8.3.2. CONFIG2 Write Address=4h / Read Address=5h 7.8.3.3. CONFIG3 Write Address=6h / Read Address=7h 7.8.3.4. CONFIG4 (Write Address=8h / Read Address=9h 7.8.3.5. CONFIG5 Write Address=Ah / Read Address=Bh 7.8.3.6. STAT1 / Read Address=Dh 7.8.3.7. STAT2 / Read Address=Fh 7.8.3.8. STAT1_CLR Write Address=10h 7.8.3.9. STAT2_CLR Write Address=12h 7.8.3.10. NOP Write Address=Fh / Read Address=Fh 8. Absolute Maximum Ratings (Ta = 25 C) 9. Electrical Characteristics 9.1. Operating Voltage Ranges 9.2. Consumption Current 9.3. Charge Pump Circuit 9.4. Gate Driver Circuits 9.5. Current Sense Amplifier Circuit 9.6. Oscillation Circuit 9.7. Abnormality Detection Circuits 9.8. Alarm Input Circuit 9.9. SPI Communication Circuit 10. Application Circuit Example 11. Package Outlines 12. Revision History 13. Abbreviation Collection RESTRICTIONS ON PRODUCT USE