EPC2102 – Enhancement-Mode GaN Power Transistor Half BridgePreliminary Specification SheetTHERMAL CHARACTERISTICSTYP Q1 Control FET Q2 Sync FET RθJC Thermal Resistance, Junction to Case 0.4 °C/W RθJB Thermal Resistance, Junction to Board (Note 2) 1.8 1.9 °C/W Rθ12 Thermal Resistance, Cross-Coupling 1.3 °C/W RθJA Thermal Resistance, Junction to Ambient (Note 1) 42 °C/W Note 1: RθJA is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board. Note 2: ∆T is determined by the following matrix equation: ∆T P Q 1 8 . 3 . 1 1 1 Q
= ⋅ ∆ T P Q 3 . 1 1 9 . 2 Q2 This matrix equation lets you calculate the temperature rise of each FET, given the power dissipated in each FET. Thermal models for EPC devices available at http://epc-co.com/epc/DesignSupport/DeviceModels.aspx Subject to Change without Notice www.epc-co.com COPYRIGHT 2015 Page 3
