Data SheetAD8420TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, +VS = 5 V, RL = 20 kΩ, unless otherwise noted. MEAN: –34.8195700 MEAN: 4.63764700SD: 31.3406SD: 1.09498600600SS500500ITTHHIFF400400R OR O EBEB300300NUMNUM20020010010000 3 8 –150–100–50050100150 -00 0246810 -00 V 45 45 OS (µV)CMRR, ±15V (µV/V) 099 099 Figure 3. Typical Distribution of Input Offset Voltage Figure 6. Typical Distribution of CMRR MEAN: 22.6643700 MEAN: 22.706700 SD: 0.6058SD: 0.615728600600500S T500S ITHI FH F400400R OR OE BBE300300NUMNUM20020010010000 4 6 202122232425 -00 202122232425 -00 POSITIVE BIAS CURRENT (nA) 45 945 9 g 0 m2 POSITIVE BIAS CURRENT (nA) 099 Figure 4. Typical Distribution of Input Bias Current Figure 7. Typical Distribution of REF, FB Bias Current 1200 MEAN: 0.0006467611200 MEAN: 0.00144205SD: 0.111551SD: 0.11208810001000S800ST800ITHIHFFR O600R O600E BBENUM400NUM40020020000 5 –0.9–0.6–0.300.30.60.9 07 -00 –0.9–0.6–0.300.30.60.9 0 5- OFFSET CURRENT (nA) 945 g 94 09 m2 OFFSET CURRENT (nA) 09 Figure 5. Typical Distribution of Input Offset Current Figure 8. Typical Distribution of REF, FB Offset Current Rev. A | Page 9 of 26 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE SETTING THE GAIN GAIN ACCURACY INPUT VOLTAGE RANGE INPUT PROTECTION Input Voltages Beyond the Rails Large Differential Input Voltage LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies Reference DRIVING THE REFERENCE PIN INPUT BIAS CURRENT RETURN PATH RADIO FREQUENCY INTERFERENCE (RFI) OUTPUT BUFFERING APPLICATIONS INFORMATION AD8420 IN ELECTROCARDIOGRAPHY (ECG) CLASSIC BRIDGE CIRCUIT 4 mA TO 20 mA SINGLE-SUPPLY RECEIVER OUTLINE DIMENSIONS ORDERING GUIDE
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