II CD4049A, CD4050A Typ s COS/MOS Hex Buffer/Converters RECOMMENDED OPERATING CONDITIONS at TA=25 0 C, Except as Noted. For maximum reliability, nominal operating conditions should be selected so that operation IS always Within the following ranges: CD4049A-lnverting Type CD4050A-Non-lnverting Type The CD4049A and CD4050A are inverting and non-inverting hex buffers, respectively, and feature logic-level conversion using o.nly one supply voltage (VCC)-The input-signal high level (V I H) can exceed the V CC supply voltage when these devices are used for logiclevel conversions_ These devices are intended for use as COS/MOS to DTL/TTL converters and can drive directly two DTL/TTL loads_ (VCC=5 V, VOL ~0.4 V, and IDN ~3.2 mA.) The CD4049A and CD4050A are designated as replacements for CD4009A and CD4010A, respectively. Because the CD4049A and CD4050A require only one power supply, they are preferred over the CD4009A and CD4010A and should be used in place of the CD4009A and CD4010A in all inverter, current driver, or logic-level conversion applications. In these applications the CD4049A and CD4050A are pin compatible with the CD4009A and CD4010A respectively, and can be substituted for these devices in existing as well as in new designs. Terminal No. 16 is not connected internally on the CD4049A or CD4050A, therefore, connection to this terminal is of no consequence to circuit operation. For applications not requiring high sink-current or voltage conversion, the CD4069 Hex Inverter is recommended. LIMITS Max. Min. CHARACTERISTIC Supply Voltage Range (Vee) (Fo' T A=Fuli Package TemperatUie Range) Input Voltage Range (VI) UNITS 3 12 V VCC 12 V 'The CD4049 and CD4050 have hlgh to low level voltage conversion capability but not IOW IO hlgh level. therefore.t.s recommendf'd that V f ;, V CC STATIC ELECTRICAL CHARACTERISTICS Quiescent Device Current, IL Max. V These types are supplied in 16-lead hermellc dual-in-Ilne ceramic packages (D and F suffixes), 16-lead dual-In-Iine plastic package (E suffix), U~~lead ceramic flat packages_(K SUffiX), and In chip form (H suffiX). 1.5 Min.; 2.25 Typ. 3 Min.; 4.5 Typ. ~~ Features: • • • • 3 Min.; 4.5 Typ. High sink current for driving 2 TTL loads High-to-Iow level logic conversion Quiescent current specified to 15 V Maximum input leakage of 1 J.LA at 15 V (full package-temperature range) 7.2 10 V 2 Min.; 3 Typ. Applications: • COS/MOS to DTL/TTL hex converter • COS/MOS current "sink" or "source" driver • COSIMOS high-to-Iow logic-level converter ~ ~ e ~ ~ ~ ~ vee _1_ F Gli ~ HoB e~ Ioe e~ Jo[j KaE LoF Vss _8_ Ne 013 Ne -16 CD4049A ~ ~ "oe I-e JoD F~ mA 'oE LoF vee _1_ VSS _8_ NC'13 Ne -16 CD4050A Fig. 1 -Functional diagrams. 554 V GoA Any Input 15 ±10-5 Typ., ±1 Max. J.LA
